linux/drivers/clk/tegra
Maxime Ripard b11fcfa884 clk: tegra: periph: Add a determine_rate hook
The Tegra periph nodiv clock implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.

This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidates to
trigger that parent change are either the assigned-clock-parents device
tree property or a call to clk_set_rate(), with determine_rate()
figuring out which parent is the best suited for a given rate.

The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.

However, the upstream device trees seem to use assigned-clock-parents on
that clock to force the parent at boot time, so it's likely that the
author intent was to force the parent through the device tree and
prevent any reparenting but through an explicit call to
clk_set_parent().

This case would be equivalent to setting the determine_rate
implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no
determine_rate implementation is provided, clk_round_rate() (through
clk_core_round_rate_nolock()) will call itself on the parent if
CLK_SET_RATE_PARENT is set, and will not change the clock rate
otherwise.

Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-36-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-08 18:39:30 -07:00
..
clk-audio-sync.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-bpmp.c clk: tegra: bpmp: Add a determine_rate hook 2023-06-08 18:39:30 -07:00
clk-device.c clk: tegra: Support runtime PM and power domain 2021-12-15 18:55:21 +01:00
clk-dfll.c clk: tegra: Don't warn three times about failure to unregister 2023-03-28 19:23:35 -07:00
clk-dfll.h clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-divider.c clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation 2020-01-10 15:50:05 +01:00
clk-id.h clk: tegra: Fix duplicated SE clock entry 2020-12-10 12:51:59 -08:00
clk-periph-fixed.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph-gate.c clk: tegra: Don't deassert reset on enabling clocks 2021-05-31 15:16:46 +02:00
clk-periph.c clk: tegra: periph: Add a determine_rate hook 2023-06-08 18:39:30 -07:00
clk-pll-out.c clk: tegra: pllout: Save and restore pllout context 2019-11-11 14:53:02 +01:00
clk-pll.c clk: tegra: Support runtime PM and power domain 2021-12-15 18:55:21 +01:00
clk-sdmmc-mux.c clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops 2021-07-27 14:54:19 -07:00
clk-super.c clk: tegra: super: Add a determine_rate hook 2023-06-08 18:39:30 -07:00
clk-tegra20-emc.c clk: tegra: Export Tegra20 EMC kernel symbols 2020-11-06 19:24:04 +01:00
clk-tegra20.c clk: tegra20: fix gcc-7 constant overflow warning 2023-03-29 15:32:25 -07:00
clk-tegra30.c clk: tegra: Fix Tegra PWM parent clock 2022-10-14 13:44:24 -07:00
clk-tegra114.c clk: tegra: Fix Tegra PWM parent clock 2022-10-14 13:44:24 -07:00
clk-tegra124-dfll-fcpu.c clk: tegra: Convert to platform remove callback returning void 2023-03-28 19:31:45 -07:00
clk-tegra124-emc.c clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver 2022-03-11 19:22:18 -08:00
clk-tegra124.c clk: tegra: Fix Tegra PWM parent clock 2022-10-14 13:44:24 -07:00
clk-tegra210-emc.c This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
clk-tegra210.c clk: tegra: Fix Tegra PWM parent clock 2022-10-14 13:44:24 -07:00
clk-tegra-audio.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra-fixed.c clk: tegra: Remove CLK_M_DIV fixed clocks 2020-03-12 11:33:32 +01:00
clk-tegra-periph.c clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock 2021-08-11 11:57:01 +02:00
clk-tegra-super-cclk.c clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling 2021-05-31 15:16:26 +02:00
clk-tegra-super-gen4.c clk: tegra: clk-super: Fix to enable PLLP branches to CPU 2019-11-11 14:53:03 +01:00
clk-utils.c clk: tegra: Refactor fractional divider calculation 2018-07-25 13:43:34 -07:00
clk.c clk: tegra: Support runtime PM and power domain 2021-12-15 18:55:21 +01:00
clk.h clk: tegra: Support runtime PM and power domain 2021-12-15 18:55:21 +01:00
cvb.c clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s align param 2021-02-11 11:56:05 -08:00
cvb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
Kconfig memory: tegra124-emc: Make driver modular 2021-01-05 18:00:09 +01:00
Makefile clk: tegra: Support runtime PM and power domain 2021-12-15 18:55:21 +01:00