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GCC 9.x automatically enables support for Loongson MMI instructions when using some -march= flags, and then errors out when -msoft-float is specified with: cc1: error: ‘-mloongson-mmi’ must be used with ‘-mhard-float’ The kernel shouldn't be using these MMI instructions anyway, just as it doesn't use floating point instructions. Explicitly disable them in order to fix the build with GCC 9.x. Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes:3702bba5eb("MIPS: Loongson: Add GCC 4.4 support for Loongson2E") Fixes:6f7a251a25("MIPS: Loongson: Add basic Loongson 2F support") Fixes:5188129b8c("MIPS: Loongson-3: Improve -march option and move it to Platform") Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: stable@vger.kernel.org # v2.6.32+ Cc: linux-mips@vger.kernel.org
82 lines
3.2 KiB
Plaintext
82 lines
3.2 KiB
Plaintext
#
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# Loongson Processors' Support
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#
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# Only gcc >= 4.4 have Loongson specific support
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cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
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cflags-$(CONFIG_CPU_LOONGSON2E) += \
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$(call cc-option,-march=loongson2e,-march=r4600)
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cflags-$(CONFIG_CPU_LOONGSON2F) += \
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$(call cc-option,-march=loongson2f,-march=r4600)
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# Enable the workarounds for Loongson2f
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ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
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ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
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$(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
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else
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cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
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endif
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ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
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$(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
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else
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cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
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endif
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endif
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cflags-$(CONFIG_CPU_LOONGSON3) += -Wa,--trap
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#
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# Some versions of binutils, not currently mainline as of 2019/02/04, support
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# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
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# to work around a CPU bug (see loongson_llsc_mb() in asm/barrier.h for a
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# description).
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#
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# We disable this in order to prevent the assembler meddling with the
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# instruction that labels refer to, ie. if we label an ll instruction:
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#
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# 1: ll v0, 0(a0)
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#
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# ...then with the assembler fix applied the label may actually point at a sync
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# instruction inserted by the assembler, and if we were using the label in an
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# exception table the table would no longer contain the address of the ll
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# instruction.
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#
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# Avoid this by explicitly disabling that assembler behaviour. If upstream
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# binutils does not merge support for the flag then we can revisit & remove
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# this later - for now it ensures vendor toolchains don't cause problems.
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#
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cflags-$(CONFIG_CPU_LOONGSON3) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
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#
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# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a
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# as MIPS64 R2; older versions as just R1. This leaves the possibility open
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# that GCC might generate R2 code for -march=loongson3a which then is rejected
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# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a
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# can't easily be used safely within the kbuild framework.
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#
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ifeq ($(call cc-ifversion, -ge, 0409, y), y)
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ifeq ($(call ld-ifversion, -ge, 225000000, y), y)
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cflags-$(CONFIG_CPU_LOONGSON3) += \
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$(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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else
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cflags-$(CONFIG_CPU_LOONGSON3) += \
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$(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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endif
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else
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cflags-$(CONFIG_CPU_LOONGSON3) += \
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$(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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endif
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# Some -march= flags enable MMI instructions, and GCC complains about that
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# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
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cflags-y += $(call cc-option,-mno-loongson-mmi)
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#
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# Loongson Machines' Support
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#
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platform-$(CONFIG_MACH_LOONGSON64) += loongson64/
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cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely
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load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
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load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000
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load-$(CONFIG_LOONGSON_MACH3X) += 0xffffffff80200000
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