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b0febde779
Now that we have a callback to check if bridge supports a given mode we can use it in Synopsys Designware HDMI bridge so that we restrict the number of probbed modes to the ones we can actually display. Also, there is no need to use mode_fixup() callback as mode_valid() will handle the mode validation. NOTE: I also had to change the pdata declaration of mode_valid custom callback so that the passed modes are const. I also changed in the platforms I found. Not even compiled it though. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: Carlos Palminha <palminha@synopsys.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Archit Taneja <architt@codeaurora.org> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: David Airlie <airlied@linux.ie> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/3d8d449e4d13d2535fa292c75f5fa931de4a4fa8.1495720737.git.joabreu@synopsys.com
164 lines
7.8 KiB
C
164 lines
7.8 KiB
C
/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DW_HDMI__
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#define __DW_HDMI__
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#include <drm/drmP.h>
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struct dw_hdmi;
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/**
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* DOC: Supported input formats and encodings
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*
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* Depending on the Hardware configuration of the Controller IP, it supports
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* a subset of the following input formats and encodings on its internal
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* 48bit bus.
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*
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* +----------------------+----------------------------------+------------------------------+
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* + Format Name + Format Code + Encodings +
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* +----------------------+----------------------------------+------------------------------+
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* + RGB 4:4:4 8bit + ``MEDIA_BUS_FMT_RGB888_1X24`` + ``V4L2_YCBCR_ENC_DEFAULT`` +
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* +----------------------+----------------------------------+------------------------------+
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* + RGB 4:4:4 10bits + ``MEDIA_BUS_FMT_RGB101010_1X30`` + ``V4L2_YCBCR_ENC_DEFAULT`` +
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* +----------------------+----------------------------------+------------------------------+
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* + RGB 4:4:4 12bits + ``MEDIA_BUS_FMT_RGB121212_1X36`` + ``V4L2_YCBCR_ENC_DEFAULT`` +
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* +----------------------+----------------------------------+------------------------------+
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* + RGB 4:4:4 16bits + ``MEDIA_BUS_FMT_RGB161616_1X48`` + ``V4L2_YCBCR_ENC_DEFAULT`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:4:4 8bit + ``MEDIA_BUS_FMT_YUV8_1X24`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* + + + or ``V4L2_YCBCR_ENC_XV601`` +
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* + + + or ``V4L2_YCBCR_ENC_XV709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:4:4 10bits + ``MEDIA_BUS_FMT_YUV10_1X30`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* + + + or ``V4L2_YCBCR_ENC_XV601`` +
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* + + + or ``V4L2_YCBCR_ENC_XV709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:4:4 12bits + ``MEDIA_BUS_FMT_YUV12_1X36`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* + + + or ``V4L2_YCBCR_ENC_XV601`` +
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* + + + or ``V4L2_YCBCR_ENC_XV709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:4:4 16bits + ``MEDIA_BUS_FMT_YUV16_1X48`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* + + + or ``V4L2_YCBCR_ENC_XV601`` +
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* + + + or ``V4L2_YCBCR_ENC_XV709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:2 8bit + ``MEDIA_BUS_FMT_UYVY8_1X16`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:2 10bits + ``MEDIA_BUS_FMT_UYVY10_1X20`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:2 12bits + ``MEDIA_BUS_FMT_UYVY12_1X24`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:0 8bit + ``MEDIA_BUS_FMT_UYYVYY8_0_5X24`` + ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:0 10bits + ``MEDIA_BUS_FMT_UYYVYY10_0_5X30``+ ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:0 12bits + ``MEDIA_BUS_FMT_UYYVYY12_0_5X36``+ ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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* + YCbCr 4:2:0 16bits + ``MEDIA_BUS_FMT_UYYVYY16_0_5X48``+ ``V4L2_YCBCR_ENC_601`` +
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* + + + or ``V4L2_YCBCR_ENC_709`` +
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* +----------------------+----------------------------------+------------------------------+
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*/
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enum {
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DW_HDMI_RES_8,
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DW_HDMI_RES_10,
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DW_HDMI_RES_12,
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DW_HDMI_RES_MAX,
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};
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enum dw_hdmi_phy_type {
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DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
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DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
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DW_HDMI_PHY_DWC_MHL_PHY = 0xc2,
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DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2,
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DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
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DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
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DW_HDMI_PHY_VENDOR_PHY = 0xfe,
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};
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struct dw_hdmi_mpll_config {
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unsigned long mpixelclock;
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struct {
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u16 cpce;
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u16 gmp;
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} res[DW_HDMI_RES_MAX];
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};
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struct dw_hdmi_curr_ctrl {
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unsigned long mpixelclock;
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u16 curr[DW_HDMI_RES_MAX];
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};
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struct dw_hdmi_phy_config {
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unsigned long mpixelclock;
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u16 sym_ctr; /*clock symbol and transmitter control*/
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u16 term; /*transmission termination value*/
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u16 vlev_ctr; /* voltage level control */
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};
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struct dw_hdmi_phy_ops {
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int (*init)(struct dw_hdmi *hdmi, void *data,
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struct drm_display_mode *mode);
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void (*disable)(struct dw_hdmi *hdmi, void *data);
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enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
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void (*update_hpd)(struct dw_hdmi *hdmi, void *data,
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bool force, bool disabled, bool rxsense);
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void (*setup_hpd)(struct dw_hdmi *hdmi, void *data);
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};
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struct dw_hdmi_plat_data {
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struct regmap *regm;
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enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
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const struct drm_display_mode *mode);
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unsigned long input_bus_format;
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unsigned long input_bus_encoding;
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/* Vendor PHY support */
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const struct dw_hdmi_phy_ops *phy_ops;
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const char *phy_name;
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void *phy_data;
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/* Synopsys PHY support */
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const struct dw_hdmi_mpll_config *mpll_cfg;
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const struct dw_hdmi_curr_ctrl *cur_ctr;
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const struct dw_hdmi_phy_config *phy_config;
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int (*configure_phy)(struct dw_hdmi *hdmi,
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const struct dw_hdmi_plat_data *pdata,
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unsigned long mpixelclock);
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};
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int dw_hdmi_probe(struct platform_device *pdev,
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const struct dw_hdmi_plat_data *plat_data);
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void dw_hdmi_remove(struct platform_device *pdev);
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void dw_hdmi_unbind(struct device *dev);
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int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
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const struct dw_hdmi_plat_data *plat_data);
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void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense);
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void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
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void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
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void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
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/* PHY configuration */
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void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
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unsigned char addr);
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#endif /* __IMX_HDMI_H__ */
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