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a324ca9cad
- Core pseudo-NMI handling code - Allow the default irq domain to be retrieved - A new interrupt controller for the Loongson LS1X platform - Affinity support for the SiFive PLIC - Better support for the iMX irqsteer driver - NUMA aware memory allocations for GICv3 - A handful of other fixes (i8259, GICv3, PLIC) -----BEGIN PGP SIGNATURE----- iQJJBAABCgAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlxwGtgVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpD+2YP/2m9cVU3Z9ak8+HdSblq2Sw8QPfd RshYS+DzppLUzhzj2w2jnz9eP2fWEqBwrQmvtOI8Fo+id0PvdE3ngaP4hPMJDyuU Ou02TV6YwE4jknoO02RXOdeBJArccc1WR5++YZjp1gGUABFUPCHwKLoZgysurapV sZQ1Ten3wlsrZKKNTdWfYFWB36d7J3eqFYeGy3sll1wQ6XUbHmUJPPrSfXMqDYzY giDD/DH8IIhfnRs+T2TxGzKtTDMnJRYJYQK2bNgtNAW+wEY2BtCLSHj8//3bK0R9 Jek9xg1NLpbQE+T8f2ZUd6BjbVxmDd3mGPvshXKyHFESl4fvC9yrddC86dBzHwrN VJmaES974PBuMtE2xPZGInh77EcelVC7OPeXsnjVMrUZo0s7tFY/TWA+rqCOLmgC A+0jagCDx1nTTYGXsqoyrHThoQoYZRX6AnXFeDJb9OLo3cV7x4w/FPORstM0PbAc butyZulVg1YQ+Y+oJK/UvIkdFL7FFqB/kgZK/lrL0InvbQMj4CBt3bsWY5OxgInF E02tgzEnrx1nHGi1XPnCTOs7DnKeaPR/h/u3PjoT7FeiZLClyiGDw7V/NuF+buLB w7Pqpn835CnkXC27MycTjPo23eZv690M4vcHL4vrhN+iuGp+2hZdXUiR15mZnH6m g0N8anZbL1iol0Gm =M6YA -----END PGP SIGNATURE----- Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates from Marc Zyngier - Core pseudo-NMI handling code - Allow the default irq domain to be retrieved - A new interrupt controller for the Loongson LS1X platform - Affinity support for the SiFive PLIC - Better support for the iMX irqsteer driver - NUMA aware memory allocations for GICv3 - A handful of other fixes (i8259, GICv3, PLIC)
990 lines
23 KiB
C
990 lines
23 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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*
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* This file contains the interrupt descriptor management code. Detailed
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* information is available in Documentation/core-api/genericirq.rst
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*
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*/
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#include <linux/irq.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/radix-tree.h>
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#include <linux/bitmap.h>
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#include <linux/irqdomain.h>
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#include <linux/sysfs.h>
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#include "internals.h"
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/*
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* lockdep: we want to handle all irq_desc locks as a single lock-class:
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*/
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static struct lock_class_key irq_desc_lock_class;
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#if defined(CONFIG_SMP)
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static int __init irq_affinity_setup(char *str)
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{
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alloc_bootmem_cpumask_var(&irq_default_affinity);
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cpulist_parse(str, irq_default_affinity);
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/*
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* Set at least the boot cpu. We don't want to end up with
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* bugreports caused by random comandline masks
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*/
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cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
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return 1;
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}
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__setup("irqaffinity=", irq_affinity_setup);
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static void __init init_irq_default_affinity(void)
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{
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if (!cpumask_available(irq_default_affinity))
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zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
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if (cpumask_empty(irq_default_affinity))
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cpumask_setall(irq_default_affinity);
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}
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#else
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static void __init init_irq_default_affinity(void)
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{
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}
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#endif
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#ifdef CONFIG_SMP
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static int alloc_masks(struct irq_desc *desc, int node)
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{
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if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
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GFP_KERNEL, node))
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return -ENOMEM;
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#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
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if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity,
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GFP_KERNEL, node)) {
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free_cpumask_var(desc->irq_common_data.affinity);
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return -ENOMEM;
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}
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#endif
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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if (!zalloc_cpumask_var_node(&desc->pending_mask, GFP_KERNEL, node)) {
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#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
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free_cpumask_var(desc->irq_common_data.effective_affinity);
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#endif
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free_cpumask_var(desc->irq_common_data.affinity);
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return -ENOMEM;
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}
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#endif
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return 0;
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}
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static void desc_smp_init(struct irq_desc *desc, int node,
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const struct cpumask *affinity)
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{
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if (!affinity)
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affinity = irq_default_affinity;
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cpumask_copy(desc->irq_common_data.affinity, affinity);
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_clear(desc->pending_mask);
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#endif
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#ifdef CONFIG_NUMA
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desc->irq_common_data.node = node;
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#endif
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}
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#else
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static inline int
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alloc_masks(struct irq_desc *desc, int node) { return 0; }
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static inline void
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desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
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#endif
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static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
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const struct cpumask *affinity, struct module *owner)
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{
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int cpu;
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desc->irq_common_data.handler_data = NULL;
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desc->irq_common_data.msi_desc = NULL;
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desc->irq_data.common = &desc->irq_common_data;
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desc->irq_data.irq = irq;
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desc->irq_data.chip = &no_irq_chip;
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desc->irq_data.chip_data = NULL;
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irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
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irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
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irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
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desc->handle_irq = handle_bad_irq;
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desc->depth = 1;
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desc->irq_count = 0;
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desc->irqs_unhandled = 0;
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desc->tot_count = 0;
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desc->name = NULL;
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desc->owner = owner;
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for_each_possible_cpu(cpu)
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*per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
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desc_smp_init(desc, node, affinity);
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}
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int nr_irqs = NR_IRQS;
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EXPORT_SYMBOL_GPL(nr_irqs);
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static DEFINE_MUTEX(sparse_irq_lock);
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static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
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#ifdef CONFIG_SPARSE_IRQ
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static void irq_kobj_release(struct kobject *kobj);
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#ifdef CONFIG_SYSFS
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static struct kobject *irq_kobj_base;
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#define IRQ_ATTR_RO(_name) \
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static struct kobj_attribute _name##_attr = __ATTR_RO(_name)
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static ssize_t per_cpu_count_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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int cpu, irq = desc->irq_data.irq;
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ssize_t ret = 0;
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char *p = "";
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for_each_possible_cpu(cpu) {
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unsigned int c = kstat_irqs_cpu(irq, cpu);
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ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%u", p, c);
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p = ",";
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}
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ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
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return ret;
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}
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IRQ_ATTR_RO(per_cpu_count);
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static ssize_t chip_name_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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ssize_t ret = 0;
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raw_spin_lock_irq(&desc->lock);
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if (desc->irq_data.chip && desc->irq_data.chip->name) {
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ret = scnprintf(buf, PAGE_SIZE, "%s\n",
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desc->irq_data.chip->name);
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}
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raw_spin_unlock_irq(&desc->lock);
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return ret;
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}
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IRQ_ATTR_RO(chip_name);
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static ssize_t hwirq_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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ssize_t ret = 0;
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raw_spin_lock_irq(&desc->lock);
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if (desc->irq_data.domain)
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ret = sprintf(buf, "%d\n", (int)desc->irq_data.hwirq);
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raw_spin_unlock_irq(&desc->lock);
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return ret;
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}
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IRQ_ATTR_RO(hwirq);
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static ssize_t type_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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ssize_t ret = 0;
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raw_spin_lock_irq(&desc->lock);
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ret = sprintf(buf, "%s\n",
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irqd_is_level_type(&desc->irq_data) ? "level" : "edge");
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raw_spin_unlock_irq(&desc->lock);
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return ret;
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}
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IRQ_ATTR_RO(type);
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static ssize_t wakeup_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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ssize_t ret = 0;
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raw_spin_lock_irq(&desc->lock);
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ret = sprintf(buf, "%s\n",
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irqd_is_wakeup_set(&desc->irq_data) ? "enabled" : "disabled");
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raw_spin_unlock_irq(&desc->lock);
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return ret;
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}
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IRQ_ATTR_RO(wakeup);
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static ssize_t name_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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ssize_t ret = 0;
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raw_spin_lock_irq(&desc->lock);
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if (desc->name)
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ret = scnprintf(buf, PAGE_SIZE, "%s\n", desc->name);
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raw_spin_unlock_irq(&desc->lock);
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return ret;
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}
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IRQ_ATTR_RO(name);
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static ssize_t actions_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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struct irqaction *action;
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ssize_t ret = 0;
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char *p = "";
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raw_spin_lock_irq(&desc->lock);
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for (action = desc->action; action != NULL; action = action->next) {
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ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%s",
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p, action->name);
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p = ",";
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}
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raw_spin_unlock_irq(&desc->lock);
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if (ret)
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ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
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return ret;
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}
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IRQ_ATTR_RO(actions);
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static struct attribute *irq_attrs[] = {
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&per_cpu_count_attr.attr,
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&chip_name_attr.attr,
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&hwirq_attr.attr,
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&type_attr.attr,
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&wakeup_attr.attr,
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&name_attr.attr,
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&actions_attr.attr,
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NULL
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};
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static struct kobj_type irq_kobj_type = {
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.release = irq_kobj_release,
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.sysfs_ops = &kobj_sysfs_ops,
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.default_attrs = irq_attrs,
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};
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static void irq_sysfs_add(int irq, struct irq_desc *desc)
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{
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if (irq_kobj_base) {
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/*
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* Continue even in case of failure as this is nothing
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* crucial.
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*/
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if (kobject_add(&desc->kobj, irq_kobj_base, "%d", irq))
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pr_warn("Failed to add kobject for irq %d\n", irq);
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}
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}
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static int __init irq_sysfs_init(void)
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{
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struct irq_desc *desc;
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int irq;
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/* Prevent concurrent irq alloc/free */
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irq_lock_sparse();
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irq_kobj_base = kobject_create_and_add("irq", kernel_kobj);
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if (!irq_kobj_base) {
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irq_unlock_sparse();
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return -ENOMEM;
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}
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/* Add the already allocated interrupts */
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for_each_irq_desc(irq, desc)
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irq_sysfs_add(irq, desc);
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irq_unlock_sparse();
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return 0;
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}
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postcore_initcall(irq_sysfs_init);
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#else /* !CONFIG_SYSFS */
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static struct kobj_type irq_kobj_type = {
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.release = irq_kobj_release,
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};
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static void irq_sysfs_add(int irq, struct irq_desc *desc) {}
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#endif /* CONFIG_SYSFS */
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static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
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static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
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{
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radix_tree_insert(&irq_desc_tree, irq, desc);
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}
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struct irq_desc *irq_to_desc(unsigned int irq)
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{
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return radix_tree_lookup(&irq_desc_tree, irq);
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}
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EXPORT_SYMBOL(irq_to_desc);
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static void delete_irq_desc(unsigned int irq)
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{
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radix_tree_delete(&irq_desc_tree, irq);
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}
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#ifdef CONFIG_SMP
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static void free_masks(struct irq_desc *desc)
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{
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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free_cpumask_var(desc->pending_mask);
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#endif
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free_cpumask_var(desc->irq_common_data.affinity);
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#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
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free_cpumask_var(desc->irq_common_data.effective_affinity);
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#endif
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}
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#else
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static inline void free_masks(struct irq_desc *desc) { }
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#endif
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void irq_lock_sparse(void)
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{
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mutex_lock(&sparse_irq_lock);
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}
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void irq_unlock_sparse(void)
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{
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mutex_unlock(&sparse_irq_lock);
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}
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static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
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const struct cpumask *affinity,
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struct module *owner)
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{
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struct irq_desc *desc;
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desc = kzalloc_node(sizeof(*desc), GFP_KERNEL, node);
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if (!desc)
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return NULL;
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/* allocate based on nr_cpu_ids */
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desc->kstat_irqs = alloc_percpu(unsigned int);
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if (!desc->kstat_irqs)
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goto err_desc;
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if (alloc_masks(desc, node))
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goto err_kstat;
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raw_spin_lock_init(&desc->lock);
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lockdep_set_class(&desc->lock, &irq_desc_lock_class);
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mutex_init(&desc->request_mutex);
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init_rcu_head(&desc->rcu);
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desc_set_defaults(irq, desc, node, affinity, owner);
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irqd_set(&desc->irq_data, flags);
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kobject_init(&desc->kobj, &irq_kobj_type);
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return desc;
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err_kstat:
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free_percpu(desc->kstat_irqs);
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err_desc:
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kfree(desc);
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return NULL;
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}
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static void irq_kobj_release(struct kobject *kobj)
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{
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struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
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free_masks(desc);
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free_percpu(desc->kstat_irqs);
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kfree(desc);
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}
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static void delayed_free_desc(struct rcu_head *rhp)
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{
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struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
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kobject_put(&desc->kobj);
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}
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static void free_desc(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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irq_remove_debugfs_entry(desc);
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unregister_irq_proc(irq, desc);
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/*
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* sparse_irq_lock protects also show_interrupts() and
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* kstat_irq_usr(). Once we deleted the descriptor from the
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* sparse tree we can free it. Access in proc will fail to
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* lookup the descriptor.
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*
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* The sysfs entry must be serialized against a concurrent
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* irq_sysfs_init() as well.
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*/
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kobject_del(&desc->kobj);
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delete_irq_desc(irq);
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/*
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* We free the descriptor, masks and stat fields via RCU. That
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* allows demultiplex interrupts to do rcu based management of
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* the child interrupts.
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* This also allows us to use rcu in kstat_irqs_usr().
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*/
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call_rcu(&desc->rcu, delayed_free_desc);
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}
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static int alloc_descs(unsigned int start, unsigned int cnt, int node,
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const struct irq_affinity_desc *affinity,
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struct module *owner)
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{
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struct irq_desc *desc;
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int i;
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/* Validate affinity mask(s) */
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if (affinity) {
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for (i = 0; i < cnt; i++) {
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if (cpumask_empty(&affinity[i].mask))
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return -EINVAL;
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < cnt; i++) {
|
|
const struct cpumask *mask = NULL;
|
|
unsigned int flags = 0;
|
|
|
|
if (affinity) {
|
|
if (affinity->is_managed) {
|
|
flags = IRQD_AFFINITY_MANAGED |
|
|
IRQD_MANAGED_SHUTDOWN;
|
|
}
|
|
mask = &affinity->mask;
|
|
node = cpu_to_node(cpumask_first(mask));
|
|
affinity++;
|
|
}
|
|
|
|
desc = alloc_desc(start + i, node, flags, mask, owner);
|
|
if (!desc)
|
|
goto err;
|
|
irq_insert_desc(start + i, desc);
|
|
irq_sysfs_add(start + i, desc);
|
|
irq_add_debugfs_entry(start + i, desc);
|
|
}
|
|
bitmap_set(allocated_irqs, start, cnt);
|
|
return start;
|
|
|
|
err:
|
|
for (i--; i >= 0; i--)
|
|
free_desc(start + i);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static int irq_expand_nr_irqs(unsigned int nr)
|
|
{
|
|
if (nr > IRQ_BITMAP_BITS)
|
|
return -ENOMEM;
|
|
nr_irqs = nr;
|
|
return 0;
|
|
}
|
|
|
|
int __init early_irq_init(void)
|
|
{
|
|
int i, initcnt, node = first_online_node;
|
|
struct irq_desc *desc;
|
|
|
|
init_irq_default_affinity();
|
|
|
|
/* Let arch update nr_irqs and return the nr of preallocated irqs */
|
|
initcnt = arch_probe_nr_irqs();
|
|
printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n",
|
|
NR_IRQS, nr_irqs, initcnt);
|
|
|
|
if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
|
|
nr_irqs = IRQ_BITMAP_BITS;
|
|
|
|
if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
|
|
initcnt = IRQ_BITMAP_BITS;
|
|
|
|
if (initcnt > nr_irqs)
|
|
nr_irqs = initcnt;
|
|
|
|
for (i = 0; i < initcnt; i++) {
|
|
desc = alloc_desc(i, node, 0, NULL, NULL);
|
|
set_bit(i, allocated_irqs);
|
|
irq_insert_desc(i, desc);
|
|
}
|
|
return arch_early_irq_init();
|
|
}
|
|
|
|
#else /* !CONFIG_SPARSE_IRQ */
|
|
|
|
struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
|
|
[0 ... NR_IRQS-1] = {
|
|
.handle_irq = handle_bad_irq,
|
|
.depth = 1,
|
|
.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
|
|
}
|
|
};
|
|
|
|
int __init early_irq_init(void)
|
|
{
|
|
int count, i, node = first_online_node;
|
|
struct irq_desc *desc;
|
|
|
|
init_irq_default_affinity();
|
|
|
|
printk(KERN_INFO "NR_IRQS: %d\n", NR_IRQS);
|
|
|
|
desc = irq_desc;
|
|
count = ARRAY_SIZE(irq_desc);
|
|
|
|
for (i = 0; i < count; i++) {
|
|
desc[i].kstat_irqs = alloc_percpu(unsigned int);
|
|
alloc_masks(&desc[i], node);
|
|
raw_spin_lock_init(&desc[i].lock);
|
|
lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
|
|
desc_set_defaults(i, &desc[i], node, NULL, NULL);
|
|
}
|
|
return arch_early_irq_init();
|
|
}
|
|
|
|
struct irq_desc *irq_to_desc(unsigned int irq)
|
|
{
|
|
return (irq < NR_IRQS) ? irq_desc + irq : NULL;
|
|
}
|
|
EXPORT_SYMBOL(irq_to_desc);
|
|
|
|
static void free_desc(unsigned int irq)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
unsigned long flags;
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
}
|
|
|
|
static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
|
|
const struct irq_affinity_desc *affinity,
|
|
struct module *owner)
|
|
{
|
|
u32 i;
|
|
|
|
for (i = 0; i < cnt; i++) {
|
|
struct irq_desc *desc = irq_to_desc(start + i);
|
|
|
|
desc->owner = owner;
|
|
}
|
|
bitmap_set(allocated_irqs, start, cnt);
|
|
return start;
|
|
}
|
|
|
|
static int irq_expand_nr_irqs(unsigned int nr)
|
|
{
|
|
return -ENOMEM;
|
|
}
|
|
|
|
void irq_mark_irq(unsigned int irq)
|
|
{
|
|
mutex_lock(&sparse_irq_lock);
|
|
bitmap_set(allocated_irqs, irq, 1);
|
|
mutex_unlock(&sparse_irq_lock);
|
|
}
|
|
|
|
#ifdef CONFIG_GENERIC_IRQ_LEGACY
|
|
void irq_init_desc(unsigned int irq)
|
|
{
|
|
free_desc(irq);
|
|
}
|
|
#endif
|
|
|
|
#endif /* !CONFIG_SPARSE_IRQ */
|
|
|
|
/**
|
|
* generic_handle_irq - Invoke the handler for a particular irq
|
|
* @irq: The irq number to handle
|
|
*
|
|
*/
|
|
int generic_handle_irq(unsigned int irq)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
if (!desc)
|
|
return -EINVAL;
|
|
generic_handle_irq_desc(desc);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(generic_handle_irq);
|
|
|
|
#ifdef CONFIG_HANDLE_DOMAIN_IRQ
|
|
/**
|
|
* __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
|
|
* @domain: The domain where to perform the lookup
|
|
* @hwirq: The HW irq number to convert to a logical one
|
|
* @lookup: Whether to perform the domain lookup or not
|
|
* @regs: Register file coming from the low-level handling code
|
|
*
|
|
* Returns: 0 on success, or -EINVAL if conversion has failed
|
|
*/
|
|
int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
|
|
bool lookup, struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
unsigned int irq = hwirq;
|
|
int ret = 0;
|
|
|
|
irq_enter();
|
|
|
|
#ifdef CONFIG_IRQ_DOMAIN
|
|
if (lookup)
|
|
irq = irq_find_mapping(domain, hwirq);
|
|
#endif
|
|
|
|
/*
|
|
* Some hardware gives randomly wrong interrupts. Rather
|
|
* than crashing, do something sensible.
|
|
*/
|
|
if (unlikely(!irq || irq >= nr_irqs)) {
|
|
ack_bad_irq(irq);
|
|
ret = -EINVAL;
|
|
} else {
|
|
generic_handle_irq(irq);
|
|
}
|
|
|
|
irq_exit();
|
|
set_irq_regs(old_regs);
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_IRQ_DOMAIN
|
|
/**
|
|
* handle_domain_nmi - Invoke the handler for a HW irq belonging to a domain
|
|
* @domain: The domain where to perform the lookup
|
|
* @hwirq: The HW irq number to convert to a logical one
|
|
* @regs: Register file coming from the low-level handling code
|
|
*
|
|
* Returns: 0 on success, or -EINVAL if conversion has failed
|
|
*/
|
|
int handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq,
|
|
struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
unsigned int irq;
|
|
int ret = 0;
|
|
|
|
nmi_enter();
|
|
|
|
irq = irq_find_mapping(domain, hwirq);
|
|
|
|
/*
|
|
* ack_bad_irq is not NMI-safe, just report
|
|
* an invalid interrupt.
|
|
*/
|
|
if (likely(irq))
|
|
generic_handle_irq(irq);
|
|
else
|
|
ret = -EINVAL;
|
|
|
|
nmi_exit();
|
|
set_irq_regs(old_regs);
|
|
return ret;
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
/* Dynamic interrupt handling */
|
|
|
|
/**
|
|
* irq_free_descs - free irq descriptors
|
|
* @from: Start of descriptor range
|
|
* @cnt: Number of consecutive irqs to free
|
|
*/
|
|
void irq_free_descs(unsigned int from, unsigned int cnt)
|
|
{
|
|
int i;
|
|
|
|
if (from >= nr_irqs || (from + cnt) > nr_irqs)
|
|
return;
|
|
|
|
mutex_lock(&sparse_irq_lock);
|
|
for (i = 0; i < cnt; i++)
|
|
free_desc(from + i);
|
|
|
|
bitmap_clear(allocated_irqs, from, cnt);
|
|
mutex_unlock(&sparse_irq_lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_free_descs);
|
|
|
|
/**
|
|
* irq_alloc_descs - allocate and initialize a range of irq descriptors
|
|
* @irq: Allocate for specific irq number if irq >= 0
|
|
* @from: Start the search from this irq number
|
|
* @cnt: Number of consecutive irqs to allocate.
|
|
* @node: Preferred node on which the irq descriptor should be allocated
|
|
* @owner: Owning module (can be NULL)
|
|
* @affinity: Optional pointer to an affinity mask array of size @cnt which
|
|
* hints where the irq descriptors should be allocated and which
|
|
* default affinities to use
|
|
*
|
|
* Returns the first irq number or error code
|
|
*/
|
|
int __ref
|
|
__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
|
|
struct module *owner, const struct irq_affinity_desc *affinity)
|
|
{
|
|
int start, ret;
|
|
|
|
if (!cnt)
|
|
return -EINVAL;
|
|
|
|
if (irq >= 0) {
|
|
if (from > irq)
|
|
return -EINVAL;
|
|
from = irq;
|
|
} else {
|
|
/*
|
|
* For interrupts which are freely allocated the
|
|
* architecture can force a lower bound to the @from
|
|
* argument. x86 uses this to exclude the GSI space.
|
|
*/
|
|
from = arch_dynirq_lower_bound(from);
|
|
}
|
|
|
|
mutex_lock(&sparse_irq_lock);
|
|
|
|
start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
|
|
from, cnt, 0);
|
|
ret = -EEXIST;
|
|
if (irq >=0 && start != irq)
|
|
goto unlock;
|
|
|
|
if (start + cnt > nr_irqs) {
|
|
ret = irq_expand_nr_irqs(start + cnt);
|
|
if (ret)
|
|
goto unlock;
|
|
}
|
|
ret = alloc_descs(start, cnt, node, affinity, owner);
|
|
unlock:
|
|
mutex_unlock(&sparse_irq_lock);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__irq_alloc_descs);
|
|
|
|
#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
|
|
/**
|
|
* irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware
|
|
* @cnt: number of interrupts to allocate
|
|
* @node: node on which to allocate
|
|
*
|
|
* Returns an interrupt number > 0 or 0, if the allocation fails.
|
|
*/
|
|
unsigned int irq_alloc_hwirqs(int cnt, int node)
|
|
{
|
|
int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL, NULL);
|
|
|
|
if (irq < 0)
|
|
return 0;
|
|
|
|
for (i = irq; cnt > 0; i++, cnt--) {
|
|
if (arch_setup_hwirq(i, node))
|
|
goto err;
|
|
irq_clear_status_flags(i, _IRQ_NOREQUEST);
|
|
}
|
|
return irq;
|
|
|
|
err:
|
|
for (i--; i >= irq; i--) {
|
|
irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
|
|
arch_teardown_hwirq(i);
|
|
}
|
|
irq_free_descs(irq, cnt);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_alloc_hwirqs);
|
|
|
|
/**
|
|
* irq_free_hwirqs - Free irq descriptor and cleanup the hardware
|
|
* @from: Free from irq number
|
|
* @cnt: number of interrupts to free
|
|
*
|
|
*/
|
|
void irq_free_hwirqs(unsigned int from, int cnt)
|
|
{
|
|
int i, j;
|
|
|
|
for (i = from, j = cnt; j > 0; i++, j--) {
|
|
irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
|
|
arch_teardown_hwirq(i);
|
|
}
|
|
irq_free_descs(from, cnt);
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_free_hwirqs);
|
|
#endif
|
|
|
|
/**
|
|
* irq_get_next_irq - get next allocated irq number
|
|
* @offset: where to start the search
|
|
*
|
|
* Returns next irq number after offset or nr_irqs if none is found.
|
|
*/
|
|
unsigned int irq_get_next_irq(unsigned int offset)
|
|
{
|
|
return find_next_bit(allocated_irqs, nr_irqs, offset);
|
|
}
|
|
|
|
struct irq_desc *
|
|
__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
|
|
unsigned int check)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
if (desc) {
|
|
if (check & _IRQ_DESC_CHECK) {
|
|
if ((check & _IRQ_DESC_PERCPU) &&
|
|
!irq_settings_is_per_cpu_devid(desc))
|
|
return NULL;
|
|
|
|
if (!(check & _IRQ_DESC_PERCPU) &&
|
|
irq_settings_is_per_cpu_devid(desc))
|
|
return NULL;
|
|
}
|
|
|
|
if (bus)
|
|
chip_bus_lock(desc);
|
|
raw_spin_lock_irqsave(&desc->lock, *flags);
|
|
}
|
|
return desc;
|
|
}
|
|
|
|
void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
|
|
{
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
if (bus)
|
|
chip_bus_sync_unlock(desc);
|
|
}
|
|
|
|
int irq_set_percpu_devid_partition(unsigned int irq,
|
|
const struct cpumask *affinity)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
if (!desc)
|
|
return -EINVAL;
|
|
|
|
if (desc->percpu_enabled)
|
|
return -EINVAL;
|
|
|
|
desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
|
|
|
|
if (!desc->percpu_enabled)
|
|
return -ENOMEM;
|
|
|
|
if (affinity)
|
|
desc->percpu_affinity = affinity;
|
|
else
|
|
desc->percpu_affinity = cpu_possible_mask;
|
|
|
|
irq_set_percpu_devid_flags(irq);
|
|
return 0;
|
|
}
|
|
|
|
int irq_set_percpu_devid(unsigned int irq)
|
|
{
|
|
return irq_set_percpu_devid_partition(irq, NULL);
|
|
}
|
|
|
|
int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
if (!desc || !desc->percpu_enabled)
|
|
return -EINVAL;
|
|
|
|
if (affinity)
|
|
cpumask_copy(affinity, desc->percpu_affinity);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_get_percpu_devid_partition);
|
|
|
|
void kstat_incr_irq_this_cpu(unsigned int irq)
|
|
{
|
|
kstat_incr_irqs_this_cpu(irq_to_desc(irq));
|
|
}
|
|
|
|
/**
|
|
* kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
|
|
* @irq: The interrupt number
|
|
* @cpu: The cpu number
|
|
*
|
|
* Returns the sum of interrupt counts on @cpu since boot for
|
|
* @irq. The caller must ensure that the interrupt is not removed
|
|
* concurrently.
|
|
*/
|
|
unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
return desc && desc->kstat_irqs ?
|
|
*per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
|
|
}
|
|
|
|
/**
|
|
* kstat_irqs - Get the statistics for an interrupt
|
|
* @irq: The interrupt number
|
|
*
|
|
* Returns the sum of interrupt counts on all cpus since boot for
|
|
* @irq. The caller must ensure that the interrupt is not removed
|
|
* concurrently.
|
|
*/
|
|
unsigned int kstat_irqs(unsigned int irq)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
unsigned int sum = 0;
|
|
int cpu;
|
|
|
|
if (!desc || !desc->kstat_irqs)
|
|
return 0;
|
|
if (!irq_settings_is_per_cpu_devid(desc) &&
|
|
!irq_settings_is_per_cpu(desc))
|
|
return desc->tot_count;
|
|
|
|
for_each_possible_cpu(cpu)
|
|
sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
|
|
return sum;
|
|
}
|
|
|
|
/**
|
|
* kstat_irqs_usr - Get the statistics for an interrupt
|
|
* @irq: The interrupt number
|
|
*
|
|
* Returns the sum of interrupt counts on all cpus since boot for @irq.
|
|
* Contrary to kstat_irqs() this can be called from any context.
|
|
* It uses rcu since a concurrent removal of an interrupt descriptor is
|
|
* observing an rcu grace period before delayed_free_desc()/irq_kobj_release().
|
|
*/
|
|
unsigned int kstat_irqs_usr(unsigned int irq)
|
|
{
|
|
unsigned int sum;
|
|
|
|
rcu_read_lock();
|
|
sum = kstat_irqs(irq);
|
|
rcu_read_unlock();
|
|
return sum;
|
|
}
|