mirror of
https://github.com/torvalds/linux.git
synced 2024-12-19 17:41:29 +00:00
7cabf491eb
Added the following domain attributes for the FSL PAMU driver: 1. Added new iommu stash attribute, which allows setting of the LIODN specific stash id parameter through IOMMU API. 2. Added an attribute for enabling/disabling DMA to a particular memory window. 3. Added domain attribute to check for PAMUV1 specific constraints. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
40 lines
1.1 KiB
C
40 lines
1.1 KiB
C
/*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License, version 2, as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
|
*
|
|
* Copyright (C) 2013 Freescale Semiconductor, Inc.
|
|
*
|
|
*/
|
|
|
|
#ifndef __FSL_PAMU_STASH_H
|
|
#define __FSL_PAMU_STASH_H
|
|
|
|
/* cache stash targets */
|
|
enum pamu_stash_target {
|
|
PAMU_ATTR_CACHE_L1 = 1,
|
|
PAMU_ATTR_CACHE_L2,
|
|
PAMU_ATTR_CACHE_L3,
|
|
};
|
|
|
|
/*
|
|
* This attribute allows configuring stashig specific parameters
|
|
* in the PAMU hardware.
|
|
*/
|
|
|
|
struct pamu_stash_attribute {
|
|
u32 cpu; /* cpu number */
|
|
u32 cache; /* cache to stash to: L1,L2,L3 */
|
|
};
|
|
|
|
#endif /* __FSL_PAMU_STASH_H */
|