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The Hygon Dhyana CPU supports ACPI P-States, and there is SMBus device (PCI device ID 0x790b) on the Hygon platform. Add Hygon Dhyana support to the cpufreq driver by using the code path of AMD family 17h. Signed-off-by: Pu Wen <puwen@hygon.cn> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: rjw@rjwysocki.net Cc: viresh.kumar@linaro.org Cc: bp@alien8.de Cc: tglx@linutronix.de Cc: mingo@redhat.com Cc: hpa@zytor.com Cc: x86@kernel.org Cc: thomas.lendacky@amd.com Cc: rafael@kernel.org Cc: linux-pm@vger.kernel.org Link: https://lkml.kernel.org/r/4db6f0f8537a93c172430c446a0297a6ab1c3c2d.1537533369.git.puwen@hygon.cn
159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
/*
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* amd_freq_sensitivity.c: AMD frequency sensitivity feedback powersave bias
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* for the ondemand governor.
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*
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* Copyright (C) 2013 Advanced Micro Devices, Inc.
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*
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* Author: Jacob Shin <jacob.shin@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/percpu-defs.h>
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#include <linux/init.h>
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#include <linux/mod_devicetable.h>
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#include <asm/msr.h>
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#include <asm/cpufeature.h>
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#include "cpufreq_ondemand.h"
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#define MSR_AMD64_FREQ_SENSITIVITY_ACTUAL 0xc0010080
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#define MSR_AMD64_FREQ_SENSITIVITY_REFERENCE 0xc0010081
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#define CLASS_CODE_SHIFT 56
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#define POWERSAVE_BIAS_MAX 1000
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#define POWERSAVE_BIAS_DEF 400
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struct cpu_data_t {
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u64 actual;
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u64 reference;
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unsigned int freq_prev;
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};
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static DEFINE_PER_CPU(struct cpu_data_t, cpu_data);
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static unsigned int amd_powersave_bias_target(struct cpufreq_policy *policy,
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unsigned int freq_next,
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unsigned int relation)
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{
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int sensitivity;
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long d_actual, d_reference;
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struct msr actual, reference;
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struct cpu_data_t *data = &per_cpu(cpu_data, policy->cpu);
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struct policy_dbs_info *policy_dbs = policy->governor_data;
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struct dbs_data *od_data = policy_dbs->dbs_data;
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struct od_dbs_tuners *od_tuners = od_data->tuners;
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if (!policy->freq_table)
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return freq_next;
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rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_ACTUAL,
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&actual.l, &actual.h);
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rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_REFERENCE,
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&reference.l, &reference.h);
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actual.h &= 0x00ffffff;
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reference.h &= 0x00ffffff;
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/* counter wrapped around, so stay on current frequency */
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if (actual.q < data->actual || reference.q < data->reference) {
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freq_next = policy->cur;
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goto out;
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}
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d_actual = actual.q - data->actual;
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d_reference = reference.q - data->reference;
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/* divide by 0, so stay on current frequency as well */
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if (d_reference == 0) {
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freq_next = policy->cur;
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goto out;
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}
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sensitivity = POWERSAVE_BIAS_MAX -
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(POWERSAVE_BIAS_MAX * (d_reference - d_actual) / d_reference);
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clamp(sensitivity, 0, POWERSAVE_BIAS_MAX);
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/* this workload is not CPU bound, so choose a lower freq */
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if (sensitivity < od_tuners->powersave_bias) {
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if (data->freq_prev == policy->cur)
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freq_next = policy->cur;
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if (freq_next > policy->cur)
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freq_next = policy->cur;
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else if (freq_next < policy->cur)
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freq_next = policy->min;
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else {
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unsigned int index;
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index = cpufreq_table_find_index_h(policy,
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policy->cur - 1);
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freq_next = policy->freq_table[index].frequency;
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}
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data->freq_prev = freq_next;
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} else
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data->freq_prev = 0;
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out:
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data->actual = actual.q;
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data->reference = reference.q;
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return freq_next;
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}
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static int __init amd_freq_sensitivity_init(void)
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{
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u64 val;
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struct pci_dev *pcidev;
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unsigned int pci_vendor;
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
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pci_vendor = PCI_VENDOR_ID_AMD;
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else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
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pci_vendor = PCI_VENDOR_ID_HYGON;
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else
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return -ENODEV;
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pcidev = pci_get_device(pci_vendor,
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PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
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if (!pcidev) {
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if (!static_cpu_has(X86_FEATURE_PROC_FEEDBACK))
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return -ENODEV;
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}
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if (rdmsrl_safe(MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &val))
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return -ENODEV;
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if (!(val >> CLASS_CODE_SHIFT))
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return -ENODEV;
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od_register_powersave_bias_handler(amd_powersave_bias_target,
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POWERSAVE_BIAS_DEF);
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return 0;
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}
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late_initcall(amd_freq_sensitivity_init);
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static void __exit amd_freq_sensitivity_exit(void)
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{
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od_unregister_powersave_bias_handler();
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}
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module_exit(amd_freq_sensitivity_exit);
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static const struct x86_cpu_id amd_freq_sensitivity_ids[] = {
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X86_FEATURE_MATCH(X86_FEATURE_PROC_FEEDBACK),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, amd_freq_sensitivity_ids);
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MODULE_AUTHOR("Jacob Shin <jacob.shin@amd.com>");
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MODULE_DESCRIPTION("AMD frequency sensitivity feedback powersave bias for "
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"the ondemand governor.");
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MODULE_LICENSE("GPL");
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