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Adding the write bit and RC bits to pte permissions does not require a pte clear and flush. There should not be other bits changed here, because restricting access or changing the PFN must have already invalidated any existing ptes (otherwise the race is already lost). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
910 lines
23 KiB
C
910 lines
23 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* Copyright 2016 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/pte-walk.h>
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/*
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* Supported radix tree geometry.
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* Like p9, we support either 5 or 9 bits at the first (lowest) level,
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* for a page size of 64k or 4k.
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*/
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static int p9_supported_radix_bits[4] = { 5, 9, 9, 13 };
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int kvmppc_mmu_radix_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, bool data, bool iswrite)
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{
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struct kvm *kvm = vcpu->kvm;
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u32 pid;
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int ret, level, ps;
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__be64 prte, rpte;
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unsigned long ptbl;
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unsigned long root, pte, index;
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unsigned long rts, bits, offset;
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unsigned long gpa;
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unsigned long proc_tbl_size;
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/* Work out effective PID */
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switch (eaddr >> 62) {
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case 0:
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pid = vcpu->arch.pid;
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break;
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case 3:
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pid = 0;
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break;
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default:
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return -EINVAL;
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}
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proc_tbl_size = 1 << ((kvm->arch.process_table & PRTS_MASK) + 12);
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if (pid * 16 >= proc_tbl_size)
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return -EINVAL;
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/* Read partition table to find root of tree for effective PID */
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ptbl = (kvm->arch.process_table & PRTB_MASK) + (pid * 16);
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ret = kvm_read_guest(kvm, ptbl, &prte, sizeof(prte));
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if (ret)
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return ret;
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root = be64_to_cpu(prte);
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rts = ((root & RTS1_MASK) >> (RTS1_SHIFT - 3)) |
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((root & RTS2_MASK) >> RTS2_SHIFT);
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bits = root & RPDS_MASK;
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root = root & RPDB_MASK;
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/* P9 DD1 interprets RTS (radix tree size) differently */
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offset = rts + 31;
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if (cpu_has_feature(CPU_FTR_POWER9_DD1))
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offset -= 3;
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/* current implementations only support 52-bit space */
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if (offset != 52)
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return -EINVAL;
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for (level = 3; level >= 0; --level) {
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if (level && bits != p9_supported_radix_bits[level])
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return -EINVAL;
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if (level == 0 && !(bits == 5 || bits == 9))
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return -EINVAL;
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offset -= bits;
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index = (eaddr >> offset) & ((1UL << bits) - 1);
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/* check that low bits of page table base are zero */
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if (root & ((1UL << (bits + 3)) - 1))
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return -EINVAL;
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ret = kvm_read_guest(kvm, root + index * 8,
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&rpte, sizeof(rpte));
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if (ret)
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return ret;
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pte = __be64_to_cpu(rpte);
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if (!(pte & _PAGE_PRESENT))
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return -ENOENT;
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if (pte & _PAGE_PTE)
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break;
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bits = pte & 0x1f;
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root = pte & 0x0fffffffffffff00ul;
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}
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/* need a leaf at lowest level; 512GB pages not supported */
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if (level < 0 || level == 3)
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return -EINVAL;
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/* offset is now log base 2 of the page size */
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gpa = pte & 0x01fffffffffff000ul;
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if (gpa & ((1ul << offset) - 1))
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return -EINVAL;
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gpa += eaddr & ((1ul << offset) - 1);
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for (ps = MMU_PAGE_4K; ps < MMU_PAGE_COUNT; ++ps)
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if (offset == mmu_psize_defs[ps].shift)
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break;
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gpte->page_size = ps;
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gpte->eaddr = eaddr;
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gpte->raddr = gpa;
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/* Work out permissions */
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gpte->may_read = !!(pte & _PAGE_READ);
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gpte->may_write = !!(pte & _PAGE_WRITE);
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gpte->may_execute = !!(pte & _PAGE_EXEC);
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if (kvmppc_get_msr(vcpu) & MSR_PR) {
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if (pte & _PAGE_PRIVILEGED) {
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gpte->may_read = 0;
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gpte->may_write = 0;
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gpte->may_execute = 0;
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}
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} else {
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if (!(pte & _PAGE_PRIVILEGED)) {
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/* Check AMR/IAMR to see if strict mode is in force */
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if (vcpu->arch.amr & (1ul << 62))
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gpte->may_read = 0;
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if (vcpu->arch.amr & (1ul << 63))
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gpte->may_write = 0;
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if (vcpu->arch.iamr & (1ul << 62))
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gpte->may_execute = 0;
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}
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}
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return 0;
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}
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static void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr,
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unsigned int pshift)
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{
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unsigned long psize = PAGE_SIZE;
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if (pshift)
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psize = 1UL << pshift;
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addr &= ~(psize - 1);
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radix__flush_tlb_lpid_page(kvm->arch.lpid, addr, psize);
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}
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static void kvmppc_radix_flush_pwc(struct kvm *kvm)
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{
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radix__flush_pwc_lpid(kvm->arch.lpid);
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}
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static unsigned long kvmppc_radix_update_pte(struct kvm *kvm, pte_t *ptep,
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unsigned long clr, unsigned long set,
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unsigned long addr, unsigned int shift)
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{
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unsigned long old = 0;
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if (!(clr & _PAGE_PRESENT) && cpu_has_feature(CPU_FTR_POWER9_DD1) &&
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pte_present(*ptep)) {
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/* have to invalidate it first */
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old = __radix_pte_update(ptep, _PAGE_PRESENT, 0);
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kvmppc_radix_tlbie_page(kvm, addr, shift);
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set |= _PAGE_PRESENT;
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old &= _PAGE_PRESENT;
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}
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return __radix_pte_update(ptep, clr, set) | old;
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}
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void kvmppc_radix_set_pte_at(struct kvm *kvm, unsigned long addr,
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pte_t *ptep, pte_t pte)
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{
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radix__set_pte_at(kvm->mm, addr, ptep, pte, 0);
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}
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static struct kmem_cache *kvm_pte_cache;
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static struct kmem_cache *kvm_pmd_cache;
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static pte_t *kvmppc_pte_alloc(void)
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{
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return kmem_cache_alloc(kvm_pte_cache, GFP_KERNEL);
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}
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static void kvmppc_pte_free(pte_t *ptep)
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{
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kmem_cache_free(kvm_pte_cache, ptep);
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}
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/* Like pmd_huge() and pmd_large(), but works regardless of config options */
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static inline int pmd_is_leaf(pmd_t pmd)
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{
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return !!(pmd_val(pmd) & _PAGE_PTE);
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}
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static pmd_t *kvmppc_pmd_alloc(void)
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{
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return kmem_cache_alloc(kvm_pmd_cache, GFP_KERNEL);
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}
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static void kvmppc_pmd_free(pmd_t *pmdp)
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{
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kmem_cache_free(kvm_pmd_cache, pmdp);
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}
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static void kvmppc_unmap_pte(struct kvm *kvm, pte_t *pte,
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unsigned long gpa, unsigned int shift)
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{
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unsigned long page_size = 1ul << shift;
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unsigned long old;
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old = kvmppc_radix_update_pte(kvm, pte, ~0UL, 0, gpa, shift);
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kvmppc_radix_tlbie_page(kvm, gpa, shift);
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if (old & _PAGE_DIRTY) {
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unsigned long gfn = gpa >> PAGE_SHIFT;
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struct kvm_memory_slot *memslot;
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memslot = gfn_to_memslot(kvm, gfn);
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if (memslot && memslot->dirty_bitmap)
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kvmppc_update_dirty_map(memslot, gfn, page_size);
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}
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}
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/*
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* kvmppc_free_p?d are used to free existing page tables, and recursively
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* descend and clear and free children.
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* Callers are responsible for flushing the PWC.
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*
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* When page tables are being unmapped/freed as part of page fault path
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* (full == false), ptes are not expected. There is code to unmap them
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* and emit a warning if encountered, but there may already be data
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* corruption due to the unexpected mappings.
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*/
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static void kvmppc_unmap_free_pte(struct kvm *kvm, pte_t *pte, bool full)
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{
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if (full) {
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memset(pte, 0, sizeof(long) << PTE_INDEX_SIZE);
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} else {
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pte_t *p = pte;
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unsigned long it;
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for (it = 0; it < PTRS_PER_PTE; ++it, ++p) {
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if (pte_val(*p) == 0)
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continue;
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WARN_ON_ONCE(1);
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kvmppc_unmap_pte(kvm, p,
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pte_pfn(*p) << PAGE_SHIFT,
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PAGE_SHIFT);
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}
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}
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kvmppc_pte_free(pte);
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}
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static void kvmppc_unmap_free_pmd(struct kvm *kvm, pmd_t *pmd, bool full)
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{
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unsigned long im;
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pmd_t *p = pmd;
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for (im = 0; im < PTRS_PER_PMD; ++im, ++p) {
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if (!pmd_present(*p))
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continue;
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if (pmd_is_leaf(*p)) {
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if (full) {
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pmd_clear(p);
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} else {
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WARN_ON_ONCE(1);
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kvmppc_unmap_pte(kvm, (pte_t *)p,
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pte_pfn(*(pte_t *)p) << PAGE_SHIFT,
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PMD_SHIFT);
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}
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} else {
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pte_t *pte;
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pte = pte_offset_map(p, 0);
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kvmppc_unmap_free_pte(kvm, pte, full);
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pmd_clear(p);
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}
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}
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kvmppc_pmd_free(pmd);
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}
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static void kvmppc_unmap_free_pud(struct kvm *kvm, pud_t *pud)
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{
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unsigned long iu;
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pud_t *p = pud;
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for (iu = 0; iu < PTRS_PER_PUD; ++iu, ++p) {
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if (!pud_present(*p))
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continue;
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if (pud_huge(*p)) {
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pud_clear(p);
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} else {
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pmd_t *pmd;
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pmd = pmd_offset(p, 0);
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kvmppc_unmap_free_pmd(kvm, pmd, true);
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pud_clear(p);
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}
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}
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pud_free(kvm->mm, pud);
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}
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void kvmppc_free_radix(struct kvm *kvm)
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{
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unsigned long ig;
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pgd_t *pgd;
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if (!kvm->arch.pgtable)
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return;
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pgd = kvm->arch.pgtable;
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for (ig = 0; ig < PTRS_PER_PGD; ++ig, ++pgd) {
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pud_t *pud;
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if (!pgd_present(*pgd))
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continue;
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pud = pud_offset(pgd, 0);
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kvmppc_unmap_free_pud(kvm, pud);
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pgd_clear(pgd);
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}
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pgd_free(kvm->mm, kvm->arch.pgtable);
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kvm->arch.pgtable = NULL;
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}
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static void kvmppc_unmap_free_pmd_entry_table(struct kvm *kvm, pmd_t *pmd,
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unsigned long gpa)
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{
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pte_t *pte = pte_offset_kernel(pmd, 0);
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/*
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* Clearing the pmd entry then flushing the PWC ensures that the pte
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* page no longer be cached by the MMU, so can be freed without
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* flushing the PWC again.
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*/
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pmd_clear(pmd);
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kvmppc_radix_flush_pwc(kvm);
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kvmppc_unmap_free_pte(kvm, pte, false);
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}
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static void kvmppc_unmap_free_pud_entry_table(struct kvm *kvm, pud_t *pud,
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unsigned long gpa)
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{
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pmd_t *pmd = pmd_offset(pud, 0);
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/*
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* Clearing the pud entry then flushing the PWC ensures that the pmd
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* page and any children pte pages will no longer be cached by the MMU,
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* so can be freed without flushing the PWC again.
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*/
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pud_clear(pud);
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kvmppc_radix_flush_pwc(kvm);
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kvmppc_unmap_free_pmd(kvm, pmd, false);
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}
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/*
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* There are a number of bits which may differ between different faults to
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* the same partition scope entry. RC bits, in the course of cleaning and
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* aging. And the write bit can change, either the access could have been
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* upgraded, or a read fault could happen concurrently with a write fault
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* that sets those bits first.
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*/
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#define PTE_BITS_MUST_MATCH (~(_PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED))
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static int kvmppc_create_pte(struct kvm *kvm, pte_t pte, unsigned long gpa,
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unsigned int level, unsigned long mmu_seq)
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{
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pgd_t *pgd;
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pud_t *pud, *new_pud = NULL;
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pmd_t *pmd, *new_pmd = NULL;
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pte_t *ptep, *new_ptep = NULL;
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int ret;
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/* Traverse the guest's 2nd-level tree, allocate new levels needed */
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pgd = kvm->arch.pgtable + pgd_index(gpa);
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pud = NULL;
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if (pgd_present(*pgd))
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pud = pud_offset(pgd, gpa);
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else
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new_pud = pud_alloc_one(kvm->mm, gpa);
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pmd = NULL;
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if (pud && pud_present(*pud) && !pud_huge(*pud))
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pmd = pmd_offset(pud, gpa);
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else if (level <= 1)
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new_pmd = kvmppc_pmd_alloc();
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if (level == 0 && !(pmd && pmd_present(*pmd) && !pmd_is_leaf(*pmd)))
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new_ptep = kvmppc_pte_alloc();
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/* Check if we might have been invalidated; let the guest retry if so */
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spin_lock(&kvm->mmu_lock);
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ret = -EAGAIN;
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if (mmu_notifier_retry(kvm, mmu_seq))
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goto out_unlock;
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/* Now traverse again under the lock and change the tree */
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ret = -ENOMEM;
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if (pgd_none(*pgd)) {
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if (!new_pud)
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goto out_unlock;
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pgd_populate(kvm->mm, pgd, new_pud);
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new_pud = NULL;
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}
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pud = pud_offset(pgd, gpa);
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if (pud_huge(*pud)) {
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unsigned long hgpa = gpa & PUD_MASK;
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/* Check if we raced and someone else has set the same thing */
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if (level == 2) {
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if (pud_raw(*pud) == pte_raw(pte)) {
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ret = 0;
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goto out_unlock;
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}
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/* Valid 1GB page here already, add our extra bits */
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WARN_ON_ONCE((pud_val(*pud) ^ pte_val(pte)) &
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PTE_BITS_MUST_MATCH);
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kvmppc_radix_update_pte(kvm, (pte_t *)pud,
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0, pte_val(pte), hgpa, PUD_SHIFT);
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ret = 0;
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goto out_unlock;
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}
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/*
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* If we raced with another CPU which has just put
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* a 1GB pte in after we saw a pmd page, try again.
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*/
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if (!new_pmd) {
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ret = -EAGAIN;
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goto out_unlock;
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}
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/* Valid 1GB page here already, remove it */
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kvmppc_unmap_pte(kvm, (pte_t *)pud, hgpa, PUD_SHIFT);
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}
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if (level == 2) {
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if (!pud_none(*pud)) {
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/*
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* There's a page table page here, but we wanted to
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* install a large page, so remove and free the page
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* table page.
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*/
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kvmppc_unmap_free_pud_entry_table(kvm, pud, gpa);
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}
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kvmppc_radix_set_pte_at(kvm, gpa, (pte_t *)pud, pte);
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ret = 0;
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goto out_unlock;
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}
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if (pud_none(*pud)) {
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if (!new_pmd)
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goto out_unlock;
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pud_populate(kvm->mm, pud, new_pmd);
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new_pmd = NULL;
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}
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pmd = pmd_offset(pud, gpa);
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if (pmd_is_leaf(*pmd)) {
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unsigned long lgpa = gpa & PMD_MASK;
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/* Check if we raced and someone else has set the same thing */
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if (level == 1) {
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if (pmd_raw(*pmd) == pte_raw(pte)) {
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ret = 0;
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goto out_unlock;
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}
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/* Valid 2MB page here already, add our extra bits */
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WARN_ON_ONCE((pmd_val(*pmd) ^ pte_val(pte)) &
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PTE_BITS_MUST_MATCH);
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kvmppc_radix_update_pte(kvm, pmdp_ptep(pmd),
|
|
0, pte_val(pte), lgpa, PMD_SHIFT);
|
|
ret = 0;
|
|
goto out_unlock;
|
|
}
|
|
|
|
/*
|
|
* If we raced with another CPU which has just put
|
|
* a 2MB pte in after we saw a pte page, try again.
|
|
*/
|
|
if (!new_ptep) {
|
|
ret = -EAGAIN;
|
|
goto out_unlock;
|
|
}
|
|
/* Valid 2MB page here already, remove it */
|
|
kvmppc_unmap_pte(kvm, pmdp_ptep(pmd), lgpa, PMD_SHIFT);
|
|
}
|
|
if (level == 1) {
|
|
if (!pmd_none(*pmd)) {
|
|
/*
|
|
* There's a page table page here, but we wanted to
|
|
* install a large page, so remove and free the page
|
|
* table page.
|
|
*/
|
|
kvmppc_unmap_free_pmd_entry_table(kvm, pmd, gpa);
|
|
}
|
|
kvmppc_radix_set_pte_at(kvm, gpa, pmdp_ptep(pmd), pte);
|
|
ret = 0;
|
|
goto out_unlock;
|
|
}
|
|
if (pmd_none(*pmd)) {
|
|
if (!new_ptep)
|
|
goto out_unlock;
|
|
pmd_populate(kvm->mm, pmd, new_ptep);
|
|
new_ptep = NULL;
|
|
}
|
|
ptep = pte_offset_kernel(pmd, gpa);
|
|
if (pte_present(*ptep)) {
|
|
/* Check if someone else set the same thing */
|
|
if (pte_raw(*ptep) == pte_raw(pte)) {
|
|
ret = 0;
|
|
goto out_unlock;
|
|
}
|
|
/* Valid page here already, add our extra bits */
|
|
WARN_ON_ONCE((pte_val(*ptep) ^ pte_val(pte)) &
|
|
PTE_BITS_MUST_MATCH);
|
|
kvmppc_radix_update_pte(kvm, ptep, 0, pte_val(pte), gpa, 0);
|
|
ret = 0;
|
|
goto out_unlock;
|
|
}
|
|
kvmppc_radix_set_pte_at(kvm, gpa, ptep, pte);
|
|
ret = 0;
|
|
|
|
out_unlock:
|
|
spin_unlock(&kvm->mmu_lock);
|
|
if (new_pud)
|
|
pud_free(kvm->mm, new_pud);
|
|
if (new_pmd)
|
|
kvmppc_pmd_free(new_pmd);
|
|
if (new_ptep)
|
|
kvmppc_pte_free(new_ptep);
|
|
return ret;
|
|
}
|
|
|
|
int kvmppc_book3s_radix_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|
unsigned long ea, unsigned long dsisr)
|
|
{
|
|
struct kvm *kvm = vcpu->kvm;
|
|
unsigned long mmu_seq, pte_size;
|
|
unsigned long gpa, gfn, hva, pfn;
|
|
struct kvm_memory_slot *memslot;
|
|
struct page *page = NULL;
|
|
long ret;
|
|
bool writing;
|
|
bool upgrade_write = false;
|
|
bool *upgrade_p = &upgrade_write;
|
|
pte_t pte, *ptep;
|
|
unsigned long pgflags;
|
|
unsigned int shift, level;
|
|
|
|
/* Check for unusual errors */
|
|
if (dsisr & DSISR_UNSUPP_MMU) {
|
|
pr_err("KVM: Got unsupported MMU fault\n");
|
|
return -EFAULT;
|
|
}
|
|
if (dsisr & DSISR_BADACCESS) {
|
|
/* Reflect to the guest as DSI */
|
|
pr_err("KVM: Got radix HV page fault with DSISR=%lx\n", dsisr);
|
|
kvmppc_core_queue_data_storage(vcpu, ea, dsisr);
|
|
return RESUME_GUEST;
|
|
}
|
|
|
|
/* Translate the logical address and get the page */
|
|
gpa = vcpu->arch.fault_gpa & ~0xfffUL;
|
|
gpa &= ~0xF000000000000000ul;
|
|
gfn = gpa >> PAGE_SHIFT;
|
|
if (!(dsisr & DSISR_PRTABLE_FAULT))
|
|
gpa |= ea & 0xfff;
|
|
memslot = gfn_to_memslot(kvm, gfn);
|
|
|
|
/* No memslot means it's an emulated MMIO region */
|
|
if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) {
|
|
if (dsisr & (DSISR_PRTABLE_FAULT | DSISR_BADACCESS |
|
|
DSISR_SET_RC)) {
|
|
/*
|
|
* Bad address in guest page table tree, or other
|
|
* unusual error - reflect it to the guest as DSI.
|
|
*/
|
|
kvmppc_core_queue_data_storage(vcpu, ea, dsisr);
|
|
return RESUME_GUEST;
|
|
}
|
|
return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,
|
|
dsisr & DSISR_ISSTORE);
|
|
}
|
|
|
|
writing = (dsisr & DSISR_ISSTORE) != 0;
|
|
if (memslot->flags & KVM_MEM_READONLY) {
|
|
if (writing) {
|
|
/* give the guest a DSI */
|
|
dsisr = DSISR_ISSTORE | DSISR_PROTFAULT;
|
|
kvmppc_core_queue_data_storage(vcpu, ea, dsisr);
|
|
return RESUME_GUEST;
|
|
}
|
|
upgrade_p = NULL;
|
|
}
|
|
|
|
if (dsisr & DSISR_SET_RC) {
|
|
/*
|
|
* Need to set an R or C bit in the 2nd-level tables;
|
|
* since we are just helping out the hardware here,
|
|
* it is sufficient to do what the hardware does.
|
|
*/
|
|
pgflags = _PAGE_ACCESSED;
|
|
if (writing)
|
|
pgflags |= _PAGE_DIRTY;
|
|
/*
|
|
* We are walking the secondary page table here. We can do this
|
|
* without disabling irq.
|
|
*/
|
|
spin_lock(&kvm->mmu_lock);
|
|
ptep = __find_linux_pte(kvm->arch.pgtable,
|
|
gpa, NULL, &shift);
|
|
if (ptep && pte_present(*ptep) &&
|
|
(!writing || pte_write(*ptep))) {
|
|
kvmppc_radix_update_pte(kvm, ptep, 0, pgflags,
|
|
gpa, shift);
|
|
dsisr &= ~DSISR_SET_RC;
|
|
}
|
|
spin_unlock(&kvm->mmu_lock);
|
|
if (!(dsisr & (DSISR_BAD_FAULT_64S | DSISR_NOHPTE |
|
|
DSISR_PROTFAULT | DSISR_SET_RC)))
|
|
return RESUME_GUEST;
|
|
}
|
|
|
|
/* used to check for invalidations in progress */
|
|
mmu_seq = kvm->mmu_notifier_seq;
|
|
smp_rmb();
|
|
|
|
/*
|
|
* Do a fast check first, since __gfn_to_pfn_memslot doesn't
|
|
* do it with !atomic && !async, which is how we call it.
|
|
* We always ask for write permission since the common case
|
|
* is that the page is writable.
|
|
*/
|
|
hva = gfn_to_hva_memslot(memslot, gfn);
|
|
if (upgrade_p && __get_user_pages_fast(hva, 1, 1, &page) == 1) {
|
|
pfn = page_to_pfn(page);
|
|
upgrade_write = true;
|
|
} else {
|
|
/* Call KVM generic code to do the slow-path check */
|
|
pfn = __gfn_to_pfn_memslot(memslot, gfn, false, NULL,
|
|
writing, upgrade_p);
|
|
if (is_error_noslot_pfn(pfn))
|
|
return -EFAULT;
|
|
page = NULL;
|
|
if (pfn_valid(pfn)) {
|
|
page = pfn_to_page(pfn);
|
|
if (PageReserved(page))
|
|
page = NULL;
|
|
}
|
|
}
|
|
|
|
/* See if we can insert a 1GB or 2MB large PTE here */
|
|
level = 0;
|
|
if (page && PageCompound(page)) {
|
|
pte_size = PAGE_SIZE << compound_order(compound_head(page));
|
|
if (pte_size >= PUD_SIZE &&
|
|
(gpa & (PUD_SIZE - PAGE_SIZE)) ==
|
|
(hva & (PUD_SIZE - PAGE_SIZE))) {
|
|
level = 2;
|
|
pfn &= ~((PUD_SIZE >> PAGE_SHIFT) - 1);
|
|
} else if (pte_size >= PMD_SIZE &&
|
|
(gpa & (PMD_SIZE - PAGE_SIZE)) ==
|
|
(hva & (PMD_SIZE - PAGE_SIZE))) {
|
|
level = 1;
|
|
pfn &= ~((PMD_SIZE >> PAGE_SHIFT) - 1);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Compute the PTE value that we need to insert.
|
|
*/
|
|
if (page) {
|
|
pgflags = _PAGE_READ | _PAGE_EXEC | _PAGE_PRESENT | _PAGE_PTE |
|
|
_PAGE_ACCESSED;
|
|
if (writing || upgrade_write)
|
|
pgflags |= _PAGE_WRITE | _PAGE_DIRTY;
|
|
pte = pfn_pte(pfn, __pgprot(pgflags));
|
|
} else {
|
|
/*
|
|
* Read the PTE from the process' radix tree and use that
|
|
* so we get the attribute bits.
|
|
*/
|
|
local_irq_disable();
|
|
ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
|
|
pte = *ptep;
|
|
local_irq_enable();
|
|
if (shift == PUD_SHIFT &&
|
|
(gpa & (PUD_SIZE - PAGE_SIZE)) ==
|
|
(hva & (PUD_SIZE - PAGE_SIZE))) {
|
|
level = 2;
|
|
} else if (shift == PMD_SHIFT &&
|
|
(gpa & (PMD_SIZE - PAGE_SIZE)) ==
|
|
(hva & (PMD_SIZE - PAGE_SIZE))) {
|
|
level = 1;
|
|
} else if (shift && shift != PAGE_SHIFT) {
|
|
/* Adjust PFN */
|
|
unsigned long mask = (1ul << shift) - PAGE_SIZE;
|
|
pte = __pte(pte_val(pte) | (hva & mask));
|
|
}
|
|
pte = __pte(pte_val(pte) | _PAGE_EXEC | _PAGE_ACCESSED);
|
|
if (writing || upgrade_write) {
|
|
if (pte_val(pte) & _PAGE_WRITE)
|
|
pte = __pte(pte_val(pte) | _PAGE_DIRTY);
|
|
} else {
|
|
pte = __pte(pte_val(pte) & ~(_PAGE_WRITE | _PAGE_DIRTY));
|
|
}
|
|
}
|
|
|
|
/* Allocate space in the tree and write the PTE */
|
|
ret = kvmppc_create_pte(kvm, pte, gpa, level, mmu_seq);
|
|
|
|
if (page) {
|
|
if (!ret && (pte_val(pte) & _PAGE_WRITE))
|
|
set_page_dirty_lock(page);
|
|
put_page(page);
|
|
}
|
|
|
|
if (ret == 0 || ret == -EAGAIN)
|
|
ret = RESUME_GUEST;
|
|
return ret;
|
|
}
|
|
|
|
/* Called with kvm->lock held */
|
|
int kvm_unmap_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
|
|
unsigned long gfn)
|
|
{
|
|
pte_t *ptep;
|
|
unsigned long gpa = gfn << PAGE_SHIFT;
|
|
unsigned int shift;
|
|
unsigned long old;
|
|
|
|
ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift);
|
|
if (ptep && pte_present(*ptep)) {
|
|
old = kvmppc_radix_update_pte(kvm, ptep, ~0UL, 0,
|
|
gpa, shift);
|
|
kvmppc_radix_tlbie_page(kvm, gpa, shift);
|
|
if ((old & _PAGE_DIRTY) && memslot->dirty_bitmap) {
|
|
unsigned long npages = 1;
|
|
if (shift)
|
|
npages = 1ul << (shift - PAGE_SHIFT);
|
|
kvmppc_update_dirty_map(memslot, gfn, npages);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* Called with kvm->lock held */
|
|
int kvm_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
|
|
unsigned long gfn)
|
|
{
|
|
pte_t *ptep;
|
|
unsigned long gpa = gfn << PAGE_SHIFT;
|
|
unsigned int shift;
|
|
int ref = 0;
|
|
|
|
ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift);
|
|
if (ptep && pte_present(*ptep) && pte_young(*ptep)) {
|
|
kvmppc_radix_update_pte(kvm, ptep, _PAGE_ACCESSED, 0,
|
|
gpa, shift);
|
|
/* XXX need to flush tlb here? */
|
|
ref = 1;
|
|
}
|
|
return ref;
|
|
}
|
|
|
|
/* Called with kvm->lock held */
|
|
int kvm_test_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot,
|
|
unsigned long gfn)
|
|
{
|
|
pte_t *ptep;
|
|
unsigned long gpa = gfn << PAGE_SHIFT;
|
|
unsigned int shift;
|
|
int ref = 0;
|
|
|
|
ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift);
|
|
if (ptep && pte_present(*ptep) && pte_young(*ptep))
|
|
ref = 1;
|
|
return ref;
|
|
}
|
|
|
|
/* Returns the number of PAGE_SIZE pages that are dirty */
|
|
static int kvm_radix_test_clear_dirty(struct kvm *kvm,
|
|
struct kvm_memory_slot *memslot, int pagenum)
|
|
{
|
|
unsigned long gfn = memslot->base_gfn + pagenum;
|
|
unsigned long gpa = gfn << PAGE_SHIFT;
|
|
pte_t *ptep;
|
|
unsigned int shift;
|
|
int ret = 0;
|
|
|
|
ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift);
|
|
if (ptep && pte_present(*ptep) && pte_dirty(*ptep)) {
|
|
ret = 1;
|
|
if (shift)
|
|
ret = 1 << (shift - PAGE_SHIFT);
|
|
kvmppc_radix_update_pte(kvm, ptep, _PAGE_DIRTY, 0,
|
|
gpa, shift);
|
|
kvmppc_radix_tlbie_page(kvm, gpa, shift);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
long kvmppc_hv_get_dirty_log_radix(struct kvm *kvm,
|
|
struct kvm_memory_slot *memslot, unsigned long *map)
|
|
{
|
|
unsigned long i, j;
|
|
int npages;
|
|
|
|
for (i = 0; i < memslot->npages; i = j) {
|
|
npages = kvm_radix_test_clear_dirty(kvm, memslot, i);
|
|
|
|
/*
|
|
* Note that if npages > 0 then i must be a multiple of npages,
|
|
* since huge pages are only used to back the guest at guest
|
|
* real addresses that are a multiple of their size.
|
|
* Since we have at most one PTE covering any given guest
|
|
* real address, if npages > 1 we can skip to i + npages.
|
|
*/
|
|
j = i + 1;
|
|
if (npages) {
|
|
set_dirty_bits(map, i, npages);
|
|
j = i + npages;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void add_rmmu_ap_encoding(struct kvm_ppc_rmmu_info *info,
|
|
int psize, int *indexp)
|
|
{
|
|
if (!mmu_psize_defs[psize].shift)
|
|
return;
|
|
info->ap_encodings[*indexp] = mmu_psize_defs[psize].shift |
|
|
(mmu_psize_defs[psize].ap << 29);
|
|
++(*indexp);
|
|
}
|
|
|
|
int kvmhv_get_rmmu_info(struct kvm *kvm, struct kvm_ppc_rmmu_info *info)
|
|
{
|
|
int i;
|
|
|
|
if (!radix_enabled())
|
|
return -EINVAL;
|
|
memset(info, 0, sizeof(*info));
|
|
|
|
/* 4k page size */
|
|
info->geometries[0].page_shift = 12;
|
|
info->geometries[0].level_bits[0] = 9;
|
|
for (i = 1; i < 4; ++i)
|
|
info->geometries[0].level_bits[i] = p9_supported_radix_bits[i];
|
|
/* 64k page size */
|
|
info->geometries[1].page_shift = 16;
|
|
for (i = 0; i < 4; ++i)
|
|
info->geometries[1].level_bits[i] = p9_supported_radix_bits[i];
|
|
|
|
i = 0;
|
|
add_rmmu_ap_encoding(info, MMU_PAGE_4K, &i);
|
|
add_rmmu_ap_encoding(info, MMU_PAGE_64K, &i);
|
|
add_rmmu_ap_encoding(info, MMU_PAGE_2M, &i);
|
|
add_rmmu_ap_encoding(info, MMU_PAGE_1G, &i);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvmppc_init_vm_radix(struct kvm *kvm)
|
|
{
|
|
kvm->arch.pgtable = pgd_alloc(kvm->mm);
|
|
if (!kvm->arch.pgtable)
|
|
return -ENOMEM;
|
|
return 0;
|
|
}
|
|
|
|
static void pte_ctor(void *addr)
|
|
{
|
|
memset(addr, 0, RADIX_PTE_TABLE_SIZE);
|
|
}
|
|
|
|
static void pmd_ctor(void *addr)
|
|
{
|
|
memset(addr, 0, RADIX_PMD_TABLE_SIZE);
|
|
}
|
|
|
|
int kvmppc_radix_init(void)
|
|
{
|
|
unsigned long size = sizeof(void *) << RADIX_PTE_INDEX_SIZE;
|
|
|
|
kvm_pte_cache = kmem_cache_create("kvm-pte", size, size, 0, pte_ctor);
|
|
if (!kvm_pte_cache)
|
|
return -ENOMEM;
|
|
|
|
size = sizeof(void *) << RADIX_PMD_INDEX_SIZE;
|
|
|
|
kvm_pmd_cache = kmem_cache_create("kvm-pmd", size, size, 0, pmd_ctor);
|
|
if (!kvm_pmd_cache) {
|
|
kmem_cache_destroy(kvm_pte_cache);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_radix_exit(void)
|
|
{
|
|
kmem_cache_destroy(kvm_pte_cache);
|
|
kmem_cache_destroy(kvm_pmd_cache);
|
|
}
|