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This patch adds binding spec for Qualcomm AP8064 SATA PHY. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
25 lines
713 B
Plaintext
25 lines
713 B
Plaintext
Qualcomm APQ8064 SATA PHY Controller
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SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
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Each SATA PHY controller should have its own node.
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Required properties:
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- compatible: compatible list, contains "qcom,apq8064-sata-phy".
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- reg: offset and length of the SATA PHY register set;
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- #phy-cells: must be zero
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- clocks: a list of phandles and clock-specifier pairs, one for each entry in
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clock-names.
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- clock-names: must be "cfg" for phy config clock.
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Example:
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sata_phy: sata-phy@1b400000 {
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compatible = "qcom,apq8064-sata-phy";
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reg = <0x1b400000 0x200>;
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clocks = <&gcc SATA_PHY_CFG_CLK>;
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clock-names = "cfg";
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#phy-cells = <0>;
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};
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