mirror of
https://github.com/torvalds/linux.git
synced 2024-11-25 05:32:00 +00:00
f47822078d
On some architectures (powerpc in particular), the number of registers
exceeds what can be represented in an integer bitmask. Ensure we
generate the proper bitmask on such platforms.
Fixes: 71ad0f5e4
("perf tools: Support for DWARF CFI unwinding on post processing")
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
34 lines
570 B
C
34 lines
570 B
C
#include <errno.h>
|
|
#include "perf_regs.h"
|
|
#include "event.h"
|
|
|
|
const struct sample_reg __weak sample_reg_masks[] = {
|
|
SMPL_REG_END
|
|
};
|
|
|
|
#ifdef HAVE_PERF_REGS_SUPPORT
|
|
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
|
|
{
|
|
int i, idx = 0;
|
|
u64 mask = regs->mask;
|
|
|
|
if (regs->cache_mask & (1ULL << id))
|
|
goto out;
|
|
|
|
if (!(mask & (1ULL << id)))
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < id; i++) {
|
|
if (mask & (1ULL << i))
|
|
idx++;
|
|
}
|
|
|
|
regs->cache_mask |= (1ULL << id);
|
|
regs->cache_regs[id] = regs->regs[idx];
|
|
|
|
out:
|
|
*valp = regs->cache_regs[id];
|
|
return 0;
|
|
}
|
|
#endif
|