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56ec8e4cd8
* Major refactoring of the CPU capability detection logic resulting in the removal of the cpus_have_const_cap() function and migrating the code to "alternative" branches where possible * Backtrace/kgdb: use IPIs and pseudo-NMI * Perf and PMU: - Add support for Ampere SoC PMUs - Multi-DTC improvements for larger CMN configurations with multiple Debug & Trace Controllers - Rework the Arm CoreSight PMU driver to allow separate registration of vendor backend modules - Fixes: add missing MODULE_DEVICE_TABLE to the amlogic perf driver; use device_get_match_data() in the xgene driver; fix NULL pointer dereference in the hisi driver caused by calling cpuhp_state_remove_instance(); use-after-free in the hisi driver * HWCAP updates: - FEAT_SVE_B16B16 (BFloat16) - FEAT_LRCPC3 (release consistency model) - FEAT_LSE128 (128-bit atomic instructions) * SVE: remove a couple of pseudo registers from the cpufeature code. There is logic in place already to detect mismatched SVE features * Miscellaneous: - Reduce the default swiotlb size (currently 64MB) if no ZONE_DMA bouncing is needed. The buffer is still required for small kmalloc() buffers - Fix module PLT counting with !RANDOMIZE_BASE - Restrict CPU_BIG_ENDIAN to LLVM IAS 15.x or newer move synchronisation code out of the set_ptes() loop - More compact cpufeature displaying enabled cores - Kselftest updates for the new CPU features -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmU7/QUACgkQa9axLQDI XvEx3xAAjICmHm+ryKJxS1IGXLYu2DXMcHUjeW6w1SxkK/vKhTMlHRx/CIWDze2l eENu7TcDLtTw+Gv9kqg30TSwzLfJhP9oFpX2T5TKkh5qlJlbz8fBtm+as14DTLCZ p2sra3J0w4B5JwTVqnj2RHOlEftMKvbyLGRkz3ve6wIUbsp5pXMkxAd/k3wOf0lC m6d9w1OMA2sOsw9YCgjcCNQGEzFMJk+13w7K+4w6A8Djn/Jxkt4fAFVn2ZlCiZzD NA2lTDWJqGmeGHo3iFdCTensWXmWTqjzxsNEf7PyBk5mBOdzDVxlTfEL7vnJg7gf BlTQ/nhIpra7rHQ9q2rwqEzbF+4Tn3uWlQfdDb7+/4goPjDh7tlBhEOYyOwTCEIT 0t9cCSvBmSCKeXC3lKWWtJ+QJKhZHSmXN84EotTs65KyyfIsi4RuSezvV/+aIL86 06sHYlYxETuujZP1cgOjf69Wsdsgizx0mqXJXf/xOjp22HFDcL4Bki6Rgi6t5OZj GEHG15kSE+eJ+RIpxpuAN8fdrlxYubsVLIksCqK7cZf9zXbQGIlifKAIrYiEx6kz FD+o+j/5niRWR6yJZCtCcGxqpSlwnYWPqc1Ds0GES8A/BphWMPozXUAZ0ll4Fnp1 yyR2/Due/eBsCNESn579kP8989rashubB8vxvdx2fcWVtLC7VgE= =QaEo -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "No major architecture features this time around, just some new HWCAP definitions, support for the Ampere SoC PMUs and a few fixes/cleanups. The bulk of the changes is reworking of the CPU capability checking code (cpus_have_cap() etc). - Major refactoring of the CPU capability detection logic resulting in the removal of the cpus_have_const_cap() function and migrating the code to "alternative" branches where possible - Backtrace/kgdb: use IPIs and pseudo-NMI - Perf and PMU: - Add support for Ampere SoC PMUs - Multi-DTC improvements for larger CMN configurations with multiple Debug & Trace Controllers - Rework the Arm CoreSight PMU driver to allow separate registration of vendor backend modules - Fixes: add missing MODULE_DEVICE_TABLE to the amlogic perf driver; use device_get_match_data() in the xgene driver; fix NULL pointer dereference in the hisi driver caused by calling cpuhp_state_remove_instance(); use-after-free in the hisi driver - HWCAP updates: - FEAT_SVE_B16B16 (BFloat16) - FEAT_LRCPC3 (release consistency model) - FEAT_LSE128 (128-bit atomic instructions) - SVE: remove a couple of pseudo registers from the cpufeature code. There is logic in place already to detect mismatched SVE features - Miscellaneous: - Reduce the default swiotlb size (currently 64MB) if no ZONE_DMA bouncing is needed. The buffer is still required for small kmalloc() buffers - Fix module PLT counting with !RANDOMIZE_BASE - Restrict CPU_BIG_ENDIAN to LLVM IAS 15.x or newer move synchronisation code out of the set_ptes() loop - More compact cpufeature displaying enabled cores - Kselftest updates for the new CPU features" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (83 commits) arm64: Restrict CPU_BIG_ENDIAN to GNU as or LLVM IAS 15.x or newer arm64: module: Fix PLT counting when CONFIG_RANDOMIZE_BASE=n arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helper perf: hisi: Fix use-after-free when register pmu fails drivers/perf: hisi_pcie: Initialize event->cpu only on success drivers/perf: hisi_pcie: Check the type first in pmu::event_init() arm64: cpufeature: Change DBM to display enabled cores arm64: cpufeature: Display the set of cores with a feature perf/arm-cmn: Enable per-DTC counter allocation perf/arm-cmn: Rework DTC counters (again) perf/arm-cmn: Fix DTC domain detection drivers: perf: arm_pmuv3: Drop some unused arguments from armv8_pmu_init() drivers: perf: arm_pmuv3: Read PMMIR_EL1 unconditionally drivers/perf: hisi: use cpuhp_state_remove_instance_nocalls() for hisi_hns3_pmu uninit process clocksource/drivers/arm_arch_timer: limit XGene-1 workaround arm64: Remove system_uses_lse_atomics() arm64: Mark the 'addr' argument to set_ptes() and __set_pte_at() as unused drivers/perf: xgene: Use device_get_match_data() perf/amlogic: add missing MODULE_DEVICE_TABLE arm64/mm: Hoist synchronization out of set_ptes() loop ... |
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.. | ||
acpi_pm.c | ||
arc_timer.c | ||
arm_arch_timer.c | ||
arm_global_timer.c | ||
armv7m_systick.c | ||
asm9260_timer.c | ||
bcm2835_timer.c | ||
bcm_kona_timer.c | ||
clksrc_st_lpc.c | ||
clksrc-dbx500-prcmu.c | ||
clps711x-timer.c | ||
dummy_timer.c | ||
dw_apb_timer_of.c | ||
dw_apb_timer.c | ||
em_sti.c | ||
exynos_mct.c | ||
hyperv_timer.c | ||
i8253.c | ||
ingenic-ost.c | ||
ingenic-sysost.c | ||
ingenic-timer.c | ||
jcore-pit.c | ||
Kconfig | ||
Makefile | ||
mips-gic-timer.c | ||
mmio.c | ||
mps2-timer.c | ||
mxs_timer.c | ||
nomadik-mtu.c | ||
numachip.c | ||
renesas-ostm.c | ||
samsung_pwm_timer.c | ||
scx200_hrt.c | ||
sh_cmt.c | ||
sh_mtu2.c | ||
sh_tmu.c | ||
timer-armada-370-xp.c | ||
timer-atmel-pit.c | ||
timer-atmel-st.c | ||
timer-atmel-tcb.c | ||
timer-cadence-ttc.c | ||
timer-clint.c | ||
timer-cs5535.c | ||
timer-davinci.c | ||
timer-digicolor.c | ||
timer-ep93xx.c | ||
timer-fsl-ftm.c | ||
timer-fttmr010.c | ||
timer-goldfish.c | ||
timer-gx6605s.c | ||
timer-gxp.c | ||
timer-imx-gpt.c | ||
timer-imx-sysctr.c | ||
timer-imx-tpm.c | ||
timer-integrator-ap.c | ||
timer-ixp4xx.c | ||
timer-keystone.c | ||
timer-loongson1-pwm.c | ||
timer-lpc32xx.c | ||
timer-mediatek-cpux.c | ||
timer-mediatek.c | ||
timer-meson6.c | ||
timer-microchip-pit64b.c | ||
timer-milbeaut.c | ||
timer-mp-csky.c | ||
timer-msc313e.c | ||
timer-npcm7xx.c | ||
timer-of.c | ||
timer-of.h | ||
timer-orion.c | ||
timer-owl.c | ||
timer-pistachio.c | ||
timer-probe.c | ||
timer-pxa.c | ||
timer-qcom.c | ||
timer-rda.c | ||
timer-riscv.c | ||
timer-rockchip.c | ||
timer-sp804.c | ||
timer-sp.h | ||
timer-sprd.c | ||
timer-stm32-lp.c | ||
timer-stm32.c | ||
timer-sun4i.c | ||
timer-sun5i.c | ||
timer-tegra186.c | ||
timer-tegra.c | ||
timer-ti-32k.c | ||
timer-ti-dm-systimer.c | ||
timer-ti-dm.c | ||
timer-versatile.c | ||
timer-vf-pit.c | ||
timer-vt8500.c | ||
timer-zevio.c |