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ab6e23a4e3
The H3 clock control unit is similar to the those of other sun8i family members like the A23. It adds a new bus gates clock similar to the simple gates, but with a different parent clock for each single gate. Some of the gates use the new AHB2 clock as parent, whose clock source is muxable between AHB1 and PLL6/2. The documentation isn't totally clear about which devices belong to AHB2 now, especially USB EHIC/OHIC, so it is mostly based on Allwinner kernel source code. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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| .. | ||
| clk-a10-codec.c | ||
| clk-a10-hosc.c | ||
| clk-a10-mod1.c | ||
| clk-a10-pll2.c | ||
| clk-a20-gmac.c | ||
| clk-factors.c | ||
| clk-factors.h | ||
| clk-mod0.c | ||
| clk-simple-gates.c | ||
| clk-sun6i-apb0-gates.c | ||
| clk-sun6i-apb0.c | ||
| clk-sun6i-ar100.c | ||
| clk-sun8i-apb0.c | ||
| clk-sun8i-bus-gates.c | ||
| clk-sun8i-mbus.c | ||
| clk-sun9i-core.c | ||
| clk-sun9i-cpus.c | ||
| clk-sun9i-mmc.c | ||
| clk-sunxi.c | ||
| clk-usb.c | ||
| Makefile | ||