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6d60b6ee0c
This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
29 lines
881 B
C
29 lines
881 B
C
/*
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* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
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* Copyright (C) 2016 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_DELAY_H
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#define _ASM_RISCV_DELAY_H
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extern unsigned long riscv_timebase;
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#define udelay udelay
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extern void udelay(unsigned long usecs);
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#define ndelay ndelay
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extern void ndelay(unsigned long nsecs);
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extern void __delay(unsigned long cycles);
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#endif /* _ASM_RISCV_DELAY_H */
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