mirror of
https://github.com/torvalds/linux.git
synced 2024-12-25 20:32:22 +00:00
5616f36713
The secondary CPU starts up in ARM mode. When the kernel is compiled in thumb2 mode we have to explicitly compile the secondary startup trampoline in ARM mode, otherwise the CPU will go to Nirvana. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reported-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
37 lines
948 B
ArmAsm
37 lines
948 B
ArmAsm
/*
|
|
* Copyright (c) 2003 ARM Limited
|
|
* Copyright (c) u-boot contributors
|
|
* Copyright (c) 2012 Pavel Machek <pavel@denx.de>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/linkage.h>
|
|
#include <linux/init.h>
|
|
#include <asm/memory.h>
|
|
#include <asm/assembler.h>
|
|
|
|
.arch armv7-a
|
|
.arm
|
|
|
|
ENTRY(secondary_trampoline)
|
|
/* CPU1 will always fetch from 0x0 when it is brought out of reset.
|
|
* Thus, we can just subtract the PAGE_OFFSET to get the physical
|
|
* address of &cpu1start_addr. This would not work for platforms
|
|
* where the physical memory does not start at 0x0.
|
|
*/
|
|
ARM_BE8(setend be)
|
|
adr r0, 1f
|
|
ldmia r0, {r1, r2}
|
|
sub r2, r2, #PAGE_OFFSET
|
|
ldr r3, [r2]
|
|
ldr r4, [r3]
|
|
ARM_BE8(rev r4, r4)
|
|
bx r4
|
|
|
|
.align
|
|
1: .long .
|
|
.long socfpga_cpu1start_addr
|
|
ENTRY(secondary_trampoline_end)
|