mirror of
https://github.com/torvalds/linux.git
synced 2024-11-24 21:21:41 +00:00
71b9114d2c
s3c24xx and s3c64xx have a lot in common, but are split across three
separate directories, which makes the interaction of the header files
more complicated than necessary.
Move all three directories into a new mach-s3c, with a minimal
set of changes to each file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Rebase, add s3c24xx and s3c64xx suffix to several files, add SPDX
headers to new files, remove plat-samsung from MAINTAINERS]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
https://lore.kernel.org/r/20200806182059.2431-39-krzk@kernel.org
26 lines
748 B
C
26 lines
748 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright 2008 Openmoko, Inc.
|
|
* Copyright 2008 Simtec Electronics
|
|
* Ben Dooks <ben@simtec.co.uk>
|
|
* http://armlinux.simtec.co.uk/
|
|
*
|
|
* S3C64XX - GPIO memory port register definitions
|
|
*/
|
|
|
|
#ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
|
|
#define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
|
|
|
|
#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0)
|
|
#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4)
|
|
|
|
#define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0)
|
|
#define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4)
|
|
#define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8)
|
|
|
|
#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0)
|
|
#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4)
|
|
|
|
#endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */
|
|
|