linux/arch/tile/include
Chris Metcalf f862eefec0 tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT
It turns out the kernel relies on barrier() to force a reload of the
percpu offset value.  Since we can't easily modify the definition of
barrier() to include "tp" as an output register, we instead provide a
definition of __my_cpu_offset as extended assembly that includes a fake
stack read to hazard against barrier(), forcing gcc to know that it
must reread "tp" and recompute anything based on "tp" after a barrier.

This fixes observed hangs in the slub allocator when we are looping
on a percpu cmpxchg_double.

A similar fix for ARMv7 was made in June in change 509eb76ebf.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-09-30 10:34:41 -04:00
..
arch tile: <arch/> header updates from upstream 2013-09-16 15:47:26 -04:00
asm tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT 2013-09-30 10:34:41 -04:00
gxio tile: improve gxio iorpc autogenerated code style 2013-09-16 15:47:20 -04:00
hv Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile 2013-09-06 11:14:33 -07:00
uapi tile: remove support for TILE64 2013-09-03 14:53:29 -04:00