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aaba098fe6
As we will exhaust the first 32 bits of AT_HWCAP let's start
exposing AT_HWCAP2 to userspace to give us up to 64 caps.
Whilst it's possible to use the remaining 32 bits of AT_HWCAP, we
prefer to expand into AT_HWCAP2 in order to provide a consistent
view to userspace between ILP32 and LP64. However internal to the
kernel we prefer to continue to use the full space of elf_hwcap.
To reduce complexity and allow for future expansion, we now
represent hwcaps in the kernel as ordinals and use a
KERNEL_HWCAP_ prefix. This allows us to support automatic feature
based module loading for all our hwcaps.
We introduce cpu_set_feature to set hwcaps which complements the
existing cpu_have_feature helper. These helpers allow us to clean
up existing direct uses of elf_hwcap and reduce any future effort
required to move beyond 64 caps.
For convenience we also introduce cpu_{have,set}_named_feature which
makes use of the cpu_feature macro to allow providing a hwcap name
without a {KERNEL_}HWCAP_ prefix.
Signed-off-by: Andrew Murray <andrew.murray@arm.com>
[will: use const_ilog2() and tweak documentation]
Signed-off-by: Will Deacon <will.deacon@arm.com>
128 lines
3.2 KiB
C
128 lines
3.2 KiB
C
/*
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* Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
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*
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* Copyright (C) 2016 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/cpufeature.h>
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#include <linux/crc-t10dif.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <crypto/internal/hash.h>
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#include <asm/neon.h>
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#include <asm/simd.h>
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#define CRC_T10DIF_PMULL_CHUNK_SIZE 16U
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asmlinkage u16 crc_t10dif_pmull_p8(u16 init_crc, const u8 *buf, size_t len);
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asmlinkage u16 crc_t10dif_pmull_p64(u16 init_crc, const u8 *buf, size_t len);
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static int crct10dif_init(struct shash_desc *desc)
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{
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u16 *crc = shash_desc_ctx(desc);
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*crc = 0;
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return 0;
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}
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static int crct10dif_update_pmull_p8(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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u16 *crc = shash_desc_ctx(desc);
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if (length >= CRC_T10DIF_PMULL_CHUNK_SIZE && may_use_simd()) {
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kernel_neon_begin();
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*crc = crc_t10dif_pmull_p8(*crc, data, length);
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kernel_neon_end();
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} else {
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*crc = crc_t10dif_generic(*crc, data, length);
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}
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return 0;
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}
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static int crct10dif_update_pmull_p64(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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u16 *crc = shash_desc_ctx(desc);
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if (length >= CRC_T10DIF_PMULL_CHUNK_SIZE && may_use_simd()) {
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kernel_neon_begin();
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*crc = crc_t10dif_pmull_p64(*crc, data, length);
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kernel_neon_end();
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} else {
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*crc = crc_t10dif_generic(*crc, data, length);
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}
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return 0;
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}
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static int crct10dif_final(struct shash_desc *desc, u8 *out)
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{
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u16 *crc = shash_desc_ctx(desc);
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*(u16 *)out = *crc;
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return 0;
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}
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static struct shash_alg crc_t10dif_alg[] = {{
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.digestsize = CRC_T10DIF_DIGEST_SIZE,
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.init = crct10dif_init,
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.update = crct10dif_update_pmull_p8,
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.final = crct10dif_final,
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.descsize = CRC_T10DIF_DIGEST_SIZE,
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.base.cra_name = "crct10dif",
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.base.cra_driver_name = "crct10dif-arm64-neon",
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.base.cra_priority = 100,
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.base.cra_blocksize = CRC_T10DIF_BLOCK_SIZE,
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.base.cra_module = THIS_MODULE,
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}, {
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.digestsize = CRC_T10DIF_DIGEST_SIZE,
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.init = crct10dif_init,
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.update = crct10dif_update_pmull_p64,
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.final = crct10dif_final,
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.descsize = CRC_T10DIF_DIGEST_SIZE,
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.base.cra_name = "crct10dif",
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.base.cra_driver_name = "crct10dif-arm64-ce",
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.base.cra_priority = 200,
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.base.cra_blocksize = CRC_T10DIF_BLOCK_SIZE,
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.base.cra_module = THIS_MODULE,
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}};
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static int __init crc_t10dif_mod_init(void)
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{
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if (cpu_have_named_feature(PMULL))
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return crypto_register_shashes(crc_t10dif_alg,
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ARRAY_SIZE(crc_t10dif_alg));
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else
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/* only register the first array element */
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return crypto_register_shash(crc_t10dif_alg);
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}
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static void __exit crc_t10dif_mod_exit(void)
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{
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if (cpu_have_named_feature(PMULL))
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crypto_unregister_shashes(crc_t10dif_alg,
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ARRAY_SIZE(crc_t10dif_alg));
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else
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crypto_unregister_shash(crc_t10dif_alg);
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}
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module_cpu_feature_match(ASIMD, crc_t10dif_mod_init);
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module_exit(crc_t10dif_mod_exit);
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MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_CRYPTO("crct10dif");
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MODULE_ALIAS_CRYPTO("crct10dif-arm64-ce");
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