WANG Xuerui aa552254cf LoongArch: Define regular names for BCE/WATCH/HVC/GSPR exceptions ... Define them according to the ISA manual, in order to enable matching the sub-exceptions for humanization purposes later. Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>		2023-05-01 17:19:10 +08:00
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asm	LoongArch: Define regular names for BCE/WATCH/HVC/GSPR exceptions	2023-05-01 17:19:10 +08:00
uapi/asm	LoongArch: Adjust user_watch_state for explicit alignment	2023-04-19 12:07:27 +08:00