mirror of
https://github.com/torvalds/linux.git
synced 2024-12-18 00:53:40 +00:00
48c1c40ab4
There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs. There is a trivial conflict in the cedrus driver, with two branches adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial remove/remove conflict in linux/dma-mapping.h. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/alSUACgkQmmx57+YA GNm7GRAAlNMVi7F0f4Ixf1bEh+J2QUonYIpZfrdxOLFwISGQ+nstGrFW2He/OeQv KAi027tZLl6Sdzjy809cLDPA4Z2IKwjVWhEbBHybvy1+irPYjnixtLd0x3YvPhjH iadlcjQ3uaGue8PvubK6CVnBEy82A+Pp29n9i4A4wX/8w+BVIhVsxwQWUBF8pFXE 3La2UZYZMVMvVZMrpTOqwCgdmLDCk+RLMVZ1IiRqBEBq5/DVq03uIXgjGEOrq8tl PXC89w7K510Is891mbBdBThQf+pZkU1vwORuknDcEJKWs9ngbEha7ebVgp32kbFl pi8DEK205d106WQgfn0Zxkpbsp8XD058wDILwkhBcteXlBaUEL6btGVLDTUCJZuv /pkH8tL4lNGpThQFbCEXC8oHZBp2xk55P+SW9RRZOoA5tAp+sz7hlf3y3YKdCSxv 4xybeeVOAgjl01WtbEC7CuIkqcKVSQ7njhLhC8r5ASteNywDThqxLT6nd0VegcQc YH3Eu9QRXpvFwQ35zMkTMWa27bMG5d60fp90bWT0R5amXZpxJJot87w8trFCxv74 mE5KvCbefCRNsTt8GOBA/WR7hVaG369g07qOvs7g4LjJEM3Nl2h/A4/zVFef9O0t yq3Nm4YCGfDSAQXzGR2SJ3nxiqbDknzJTAtZPf4BmbaMuPOIJ5k= =BjJf -----END PGP SIGNATURE----- Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
261 lines
7.8 KiB
Plaintext
261 lines
7.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config ARCH_HAS_RESET_CONTROLLER
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bool
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menuconfig RESET_CONTROLLER
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bool "Reset Controller Support"
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default y if ARCH_HAS_RESET_CONTROLLER
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help
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Generic Reset Controller support.
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This framework is designed to abstract reset handling of devices
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via GPIOs or SoC-internal reset controller modules.
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If unsure, say no.
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if RESET_CONTROLLER
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config RESET_A10SR
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tristate "Altera Arria10 System Resource Reset"
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depends on MFD_ALTERA_A10SR
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help
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This option enables support for the external reset functions for
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peripheral PHYs on the Altera Arria10 System Resource Chip.
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config RESET_ATH79
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bool "AR71xx Reset Driver" if COMPILE_TEST
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default ATH79
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help
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This enables the ATH79 reset controller driver that supports the
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AR71xx SoC reset controller.
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config RESET_AXS10X
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bool "AXS10x Reset Driver" if COMPILE_TEST
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default ARC_PLAT_AXS10X
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help
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This enables the reset controller driver for AXS10x.
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config RESET_BCM6345
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bool "BCM6345 Reset Controller"
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depends on BMIPS_GENERIC || COMPILE_TEST
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default BMIPS_GENERIC
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help
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This enables the reset controller driver for BCM6345 SoCs.
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config RESET_BERLIN
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bool "Berlin Reset Driver" if COMPILE_TEST
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default ARCH_BERLIN
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help
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This enables the reset controller driver for Marvell Berlin SoCs.
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config RESET_BRCMSTB
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tristate "Broadcom STB reset controller"
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depends on ARCH_BRCMSTB || COMPILE_TEST
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default ARCH_BRCMSTB
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help
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This enables the reset controller driver for Broadcom STB SoCs using
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a SUN_TOP_CTRL_SW_INIT style controller.
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config RESET_BRCMSTB_RESCAL
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bool "Broadcom STB RESCAL reset controller"
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depends on HAS_IOMEM
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default ARCH_BRCMSTB || COMPILE_TEST
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help
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This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
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BCM7216.
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config RESET_HSDK
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bool "Synopsys HSDK Reset Driver"
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depends on HAS_IOMEM
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depends on ARC_SOC_HSDK || COMPILE_TEST
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help
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This enables the reset controller driver for HSDK board.
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config RESET_IMX7
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tristate "i.MX7/8 Reset Driver"
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depends on HAS_IOMEM
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depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
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default y if SOC_IMX7D
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select MFD_SYSCON
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help
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This enables the reset controller driver for i.MX7 SoCs.
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config RESET_INTEL_GW
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bool "Intel Reset Controller Driver"
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depends on OF && HAS_IOMEM
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select REGMAP_MMIO
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help
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This enables the reset controller driver for Intel Gateway SoCs.
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Say Y to control the reset signals provided by reset controller.
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Otherwise, say N.
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config RESET_LANTIQ
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bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
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default SOC_TYPE_XWAY
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help
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This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
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config RESET_LPC18XX
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bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
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default ARCH_LPC18XX
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help
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This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
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config RESET_MESON
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tristate "Meson Reset Driver"
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depends on ARCH_MESON || COMPILE_TEST
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default ARCH_MESON
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help
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This enables the reset driver for Amlogic Meson SoCs.
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config RESET_MESON_AUDIO_ARB
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tristate "Meson Audio Memory Arbiter Reset Driver"
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depends on ARCH_MESON || COMPILE_TEST
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help
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This enables the reset driver for Audio Memory Arbiter of
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Amlogic's A113 based SoCs
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config RESET_NPCM
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bool "NPCM BMC Reset Driver" if COMPILE_TEST
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default ARCH_NPCM
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help
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This enables the reset controller driver for Nuvoton NPCM
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BMC SoCs.
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config RESET_OXNAS
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bool
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config RESET_PISTACHIO
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bool "Pistachio Reset Driver" if COMPILE_TEST
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default MACH_PISTACHIO
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help
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This enables the reset driver for ImgTec Pistachio SoCs.
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config RESET_QCOM_AOSS
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tristate "Qcom AOSS Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the AOSS (always on subsystem) reset driver
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for Qualcomm SDM845 SoCs. Say Y if you want to control
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reset signals provided by AOSS for Modem, Venus, ADSP,
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GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
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config RESET_QCOM_PDC
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tristate "Qualcomm PDC Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the PDC (Power Domain Controller) reset driver
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for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
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to control reset signals provided by PDC for Modem, Compute,
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Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
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config RESET_RASPBERRYPI
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tristate "Raspberry Pi 4 Firmware Reset Driver"
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depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
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default USB_XHCI_PCI
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help
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Raspberry Pi 4's co-processor controls some of the board's HW
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initialization process, but it's up to Linux to trigger it when
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relevant. This driver provides a reset controller capable of
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interfacing with RPi4's co-processor and model these firmware
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initialization routines as reset lines.
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config RESET_SCMI
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tristate "Reset driver controlled via ARM SCMI interface"
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depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
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default ARM_SCMI_PROTOCOL
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help
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This driver provides support for reset signal/domains that are
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controlled by firmware that implements the SCMI interface.
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This driver uses SCMI Message Protocol to interact with the
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firmware controlling all the reset signals.
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST
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default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
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help
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This enables a simple reset controller driver for reset lines that
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that can be asserted and deasserted by toggling bits in a contiguous,
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exclusive register space.
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Currently this driver supports:
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- Altera SoCFPGAs
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- ASPEED BMC SoCs
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- Bitmain BM1880 SoC
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- Realtek SoCs
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- RCC reset controller in STM32 MCUs
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- Allwinner SoCs
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- ZTE's zx2967 family
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config RESET_STM32MP157
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bool "STM32MP157 Reset Driver" if COMPILE_TEST
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default MACH_STM32MP157
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help
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This enables the RCC reset controller driver for STM32 MPUs.
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config RESET_SOCFPGA
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bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
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default ARCH_SOCFPGA
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select RESET_SIMPLE
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help
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This enables the reset driver for the SoCFPGA ARMv7 platforms. This
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driver gets initialized early during platform init calls.
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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default ARCH_SUNXI
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select RESET_SIMPLE
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help
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This enables the reset driver for Allwinner SoCs.
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config RESET_TI_SCI
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tristate "TI System Control Interface (TI-SCI) reset driver"
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depends on TI_SCI_PROTOCOL
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_TI_SYSCON
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tristate "TI SYSCON Reset Driver"
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depends on HAS_IOMEM
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select MFD_SYSCON
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help
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This enables the reset driver support for TI devices with
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memory-mapped reset registers as part of a syscon device node. If
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you wish to use the reset framework for such memory-mapped devices,
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say Y here. Otherwise, say N.
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config RESET_UNIPHIER
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tristate "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER || COMPILE_TEST
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depends on OF && MFD_SYSCON
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default ARCH_UNIPHIER
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config RESET_UNIPHIER_GLUE
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tristate "Reset driver in glue layer for UniPhier SoCs"
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depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
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default ARCH_UNIPHIER
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select RESET_SIMPLE
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help
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Support for peripheral core reset included in its own glue layer
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on UniPhier SoCs. Say Y if you want to control reset signals
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provided by the glue layer.
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config RESET_ZYNQ
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bool "ZYNQ Reset Driver" if COMPILE_TEST
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default ARCH_ZYNQ
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help
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This enables the reset controller driver for Xilinx Zynq SoCs.
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source "drivers/reset/sti/Kconfig"
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source "drivers/reset/hisilicon/Kconfig"
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source "drivers/reset/tegra/Kconfig"
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endif
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