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a935c0523c
The Global (1) internal SMI device is an extended set of registers
containing ATU, PPU, VTU, STU, etc.
It is present on every switches, usually at SMI address 0x1B. But old
models such as 88E6060 access it at address 0xF, thus using REG_GLOBAL
is erroneous.
Add a global1_addr info member used by mv88e6xxx_g1_{read,write} and
mv88e6xxx_g1_wait helpers in a new global1.c file.
This patch finally removes _mv88e6xxx_reg_{read,write}, in favor on the
appropriate helpers. No functional changes here.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
35 lines
950 B
C
35 lines
950 B
C
/*
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* Marvell 88E6xxx Switch Global (1) Registers support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "mv88e6xxx.h"
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#include "global1.h"
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int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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int addr = chip->info->global1_addr;
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return mv88e6xxx_read(chip, addr, reg, val);
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}
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int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val)
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{
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int addr = chip->info->global1_addr;
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return mv88e6xxx_write(chip, addr, reg, val);
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}
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int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask)
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{
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return mv88e6xxx_wait(chip, chip->info->global1_addr, reg, mask);
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}
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