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a923fc730f
Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 registers. This allows support for GMII, MII, RGMII, and SGMII designs where the external PHY is always accesible through Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible through MDIO phy 0 registers for SGMII applications. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Tested-by: Kai Lin Ng <kailng@altera.com> Tested-by: Dalon Westergreen <dwesterg@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| altera_msgdma.c | ||
| altera_msgdma.h | ||
| altera_msgdmahw.h | ||
| altera_sgdma.c | ||
| altera_sgdma.h | ||
| altera_sgdmahw.h | ||
| altera_tse_ethtool.c | ||
| altera_tse_main.c | ||
| altera_tse.h | ||
| altera_utils.c | ||
| altera_utils.h | ||
| Kconfig | ||
| Makefile | ||