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e6550b3ee1
Based on the normalized pattern:
this program is free software you may redistribute it and/or modify it
under the terms of the gnu general public license as published by the
free software foundation version 2 of the license the software is
provided as is without warranty of any kind express or implied
including but not limited to the warranties of merchantability fitness
for a particular purpose and noninfringement in no event shall the
authors or copyright holders be liable for any claim damages or other
liability whether in an action of contract tort or otherwise arising
from out of or in connection with the software or the use or other
dealings in the software
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
58 lines
2.1 KiB
C
58 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2008 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*/
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#ifndef _VNIC_NIC_H_
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#define _VNIC_NIC_H_
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/*
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* These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
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* Driver) when both are built with CONFIG options =y
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*/
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#define vnic_set_nic_cfg fnic_set_nic_cfg
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#define NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD 0xffUL
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#define NIC_CFG_RSS_DEFAULT_CPU_SHIFT 0
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#define NIC_CFG_RSS_HASH_TYPE (0xffUL << 8)
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#define NIC_CFG_RSS_HASH_TYPE_MASK_FIELD 0xffUL
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#define NIC_CFG_RSS_HASH_TYPE_SHIFT 8
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#define NIC_CFG_RSS_HASH_BITS (7UL << 16)
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#define NIC_CFG_RSS_HASH_BITS_MASK_FIELD 7UL
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#define NIC_CFG_RSS_HASH_BITS_SHIFT 16
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#define NIC_CFG_RSS_BASE_CPU (7UL << 19)
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#define NIC_CFG_RSS_BASE_CPU_MASK_FIELD 7UL
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#define NIC_CFG_RSS_BASE_CPU_SHIFT 19
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#define NIC_CFG_RSS_ENABLE (1UL << 22)
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#define NIC_CFG_RSS_ENABLE_MASK_FIELD 1UL
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#define NIC_CFG_RSS_ENABLE_SHIFT 22
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#define NIC_CFG_TSO_IPID_SPLIT_EN (1UL << 23)
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#define NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD 1UL
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#define NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT 23
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#define NIC_CFG_IG_VLAN_STRIP_EN (1UL << 24)
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#define NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD 1UL
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#define NIC_CFG_IG_VLAN_STRIP_EN_SHIFT 24
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static inline void vnic_set_nic_cfg(u32 *nic_cfg,
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u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu,
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u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en)
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{
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*nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) |
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((rss_hash_type & NIC_CFG_RSS_HASH_TYPE_MASK_FIELD)
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<< NIC_CFG_RSS_HASH_TYPE_SHIFT) |
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((rss_hash_bits & NIC_CFG_RSS_HASH_BITS_MASK_FIELD)
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<< NIC_CFG_RSS_HASH_BITS_SHIFT) |
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((rss_base_cpu & NIC_CFG_RSS_BASE_CPU_MASK_FIELD)
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<< NIC_CFG_RSS_BASE_CPU_SHIFT) |
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((rss_enable & NIC_CFG_RSS_ENABLE_MASK_FIELD)
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<< NIC_CFG_RSS_ENABLE_SHIFT) |
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((tso_ipid_split_en & NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD)
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<< NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT) |
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((ig_vlan_strip_en & NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD)
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<< NIC_CFG_IG_VLAN_STRIP_EN_SHIFT);
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}
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#endif /* _VNIC_NIC_H_ */
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