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2703c21a82
This needs a massive cleanup, but to catch bugs from the interface changes vs the engine code cleanup, this will be done later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
114 lines
3.9 KiB
C
114 lines
3.9 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#ifndef __NOUVEAU_VM_H__
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#define __NOUVEAU_VM_H__
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_mm.h"
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struct nouveau_vm_pgt {
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struct nouveau_gpuobj *obj[2];
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u32 refcount[2];
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};
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struct nouveau_vm_pgd {
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struct list_head head;
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struct nouveau_gpuobj *obj;
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};
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struct nouveau_vma {
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struct nouveau_vm *vm;
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struct nouveau_mm_node *node;
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u64 offset;
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u32 access;
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};
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struct nouveau_vm {
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struct drm_device *dev;
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struct nouveau_mm *mm;
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int refcount;
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struct list_head pgd_list;
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atomic_t engref[16];
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struct nouveau_vm_pgt *pgt;
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u32 fpde;
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u32 lpde;
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u32 pgt_bits;
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u8 spg_shift;
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u8 lpg_shift;
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void (*map_pgt)(struct nouveau_gpuobj *pgd, u32 pde,
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struct nouveau_gpuobj *pgt[2]);
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void (*map)(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt,
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u64 phys, u64 delta);
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void (*map_sg)(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
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void (*unmap)(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt);
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void (*flush)(struct nouveau_vm *);
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};
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/* nouveau_vm.c */
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int nouveau_vm_new(struct drm_device *, u64 offset, u64 length, u64 mm_offset,
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struct nouveau_vm **);
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int nouveau_vm_ref(struct nouveau_vm *, struct nouveau_vm **,
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struct nouveau_gpuobj *pgd);
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int nouveau_vm_get(struct nouveau_vm *, u64 size, u32 page_shift,
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u32 access, struct nouveau_vma *);
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void nouveau_vm_put(struct nouveau_vma *);
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void nouveau_vm_map(struct nouveau_vma *, struct nouveau_mem *);
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void nouveau_vm_map_at(struct nouveau_vma *, u64 offset, struct nouveau_mem *);
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void nouveau_vm_unmap(struct nouveau_vma *);
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void nouveau_vm_unmap_at(struct nouveau_vma *, u64 offset, u64 length);
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void nouveau_vm_map_sg(struct nouveau_vma *, u64 offset, u64 length,
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struct nouveau_mem *, dma_addr_t *);
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/* nv50_vm.c */
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void nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
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struct nouveau_gpuobj *pgt[2]);
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void nv50_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt, u64 phys, u64 delta);
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void nv50_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
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void nv50_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt);
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void nv50_vm_flush(struct nouveau_vm *);
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void nv50_vm_flush_engine(struct drm_device *, int engine);
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/* nvc0_vm.c */
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void nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
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struct nouveau_gpuobj *pgt[2]);
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void nvc0_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt, u64 phys, u64 delta);
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void nvc0_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *,
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struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
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void nvc0_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt);
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void nvc0_vm_flush(struct nouveau_vm *);
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#endif
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