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3b20b894d4
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
613 lines
16 KiB
C
613 lines
16 KiB
C
/*
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* LCD/Backlight Driver for Sharp Zaurus Handhelds (various models)
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*
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* Copyright (c) 2004-2006 Richard Purdie
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*
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* Based on Sharp's 2.4 Backlight Driver
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*
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* Copyright (c) 2008 Marvell International Ltd.
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* Converted to SPI device based LCD/Backlight device driver
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* by Eric Miao <eric.miao@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/fb.h>
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#include <linux/lcd.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/corgi_lcd.h>
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#include <linux/slab.h>
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#include <asm/mach/sharpsl_param.h>
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#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
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/* Register Addresses */
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#define RESCTL_ADRS 0x00
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#define PHACTRL_ADRS 0x01
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#define DUTYCTRL_ADRS 0x02
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#define POWERREG0_ADRS 0x03
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#define POWERREG1_ADRS 0x04
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#define GPOR3_ADRS 0x05
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#define PICTRL_ADRS 0x06
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#define POLCTRL_ADRS 0x07
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/* Register Bit Definitions */
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#define RESCTL_QVGA 0x01
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#define RESCTL_VGA 0x00
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#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
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#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
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#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
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#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
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#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
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#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
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#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
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#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
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#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
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#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
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#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
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#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
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#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
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#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
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#define PICTRL_INIT_STATE 0x01
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#define PICTRL_INIOFF 0x02
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#define PICTRL_POWER_DOWN 0x04
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#define PICTRL_COM_SIGNAL_OFF 0x08
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#define PICTRL_DAC_SIGNAL_OFF 0x10
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#define POLCTRL_SYNC_POL_FALL 0x01
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#define POLCTRL_EN_POL_FALL 0x02
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#define POLCTRL_DATA_POL_FALL 0x04
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#define POLCTRL_SYNC_ACT_H 0x08
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#define POLCTRL_EN_ACT_L 0x10
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#define POLCTRL_SYNC_POL_RISE 0x00
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#define POLCTRL_EN_POL_RISE 0x00
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#define POLCTRL_DATA_POL_RISE 0x00
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#define POLCTRL_SYNC_ACT_L 0x00
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#define POLCTRL_EN_ACT_H 0x00
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#define PHACTRL_PHASE_MANUAL 0x01
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#define DEFAULT_PHAD_QVGA (9)
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#define DEFAULT_COMADJ (125)
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struct corgi_lcd {
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struct spi_device *spi_dev;
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struct lcd_device *lcd_dev;
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struct backlight_device *bl_dev;
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int limit_mask;
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int intensity;
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int power;
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int mode;
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char buf[2];
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int gpio_backlight_on;
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int gpio_backlight_cont;
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int gpio_backlight_cont_inverted;
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void (*kick_battery)(void);
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};
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static int corgi_ssp_lcdtg_send(struct corgi_lcd *lcd, int reg, uint8_t val);
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static struct corgi_lcd *the_corgi_lcd;
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static unsigned long corgibl_flags;
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#define CORGIBL_SUSPENDED 0x01
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#define CORGIBL_BATTLOW 0x02
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/*
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* This is only a pseudo I2C interface. We can't use the standard kernel
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* routines as the interface is write only. We just assume the data is acked...
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*/
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static void lcdtg_ssp_i2c_send(struct corgi_lcd *lcd, uint8_t data)
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{
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS, data);
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udelay(10);
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}
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static void lcdtg_i2c_send_bit(struct corgi_lcd *lcd, uint8_t data)
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{
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lcdtg_ssp_i2c_send(lcd, data);
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lcdtg_ssp_i2c_send(lcd, data | POWER0_COM_DCLK);
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lcdtg_ssp_i2c_send(lcd, data);
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}
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static void lcdtg_i2c_send_start(struct corgi_lcd *lcd, uint8_t base)
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{
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lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT);
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lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK);
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lcdtg_ssp_i2c_send(lcd, base);
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}
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static void lcdtg_i2c_send_stop(struct corgi_lcd *lcd, uint8_t base)
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{
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lcdtg_ssp_i2c_send(lcd, base);
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lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK);
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lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT);
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}
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static void lcdtg_i2c_send_byte(struct corgi_lcd *lcd,
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uint8_t base, uint8_t data)
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{
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int i;
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for (i = 0; i < 8; i++) {
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if (data & 0x80)
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lcdtg_i2c_send_bit(lcd, base | POWER0_COM_DOUT);
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else
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lcdtg_i2c_send_bit(lcd, base);
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data <<= 1;
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}
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}
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static void lcdtg_i2c_wait_ack(struct corgi_lcd *lcd, uint8_t base)
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{
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lcdtg_i2c_send_bit(lcd, base);
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}
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static void lcdtg_set_common_voltage(struct corgi_lcd *lcd,
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uint8_t base_data, uint8_t data)
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{
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/* Set Common Voltage to M62332FP via I2C */
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lcdtg_i2c_send_start(lcd, base_data);
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lcdtg_i2c_send_byte(lcd, base_data, 0x9c);
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lcdtg_i2c_wait_ack(lcd, base_data);
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lcdtg_i2c_send_byte(lcd, base_data, 0x00);
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lcdtg_i2c_wait_ack(lcd, base_data);
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lcdtg_i2c_send_byte(lcd, base_data, data);
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lcdtg_i2c_wait_ack(lcd, base_data);
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lcdtg_i2c_send_stop(lcd, base_data);
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}
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static int corgi_ssp_lcdtg_send(struct corgi_lcd *lcd, int adrs, uint8_t data)
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{
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struct spi_message msg;
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struct spi_transfer xfer = {
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.len = 1,
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.cs_change = 1,
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.tx_buf = lcd->buf,
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};
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lcd->buf[0] = ((adrs & 0x07) << 5) | (data & 0x1f);
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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return spi_sync(lcd->spi_dev, &msg);
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}
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/* Set Phase Adjust */
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static void lcdtg_set_phadadj(struct corgi_lcd *lcd, int mode)
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{
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int adj;
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switch (mode) {
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case CORGI_LCD_MODE_VGA:
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/* Setting for VGA */
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adj = sharpsl_param.phadadj;
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adj = (adj < 0) ? PHACTRL_PHASE_MANUAL :
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PHACTRL_PHASE_MANUAL | ((adj & 0xf) << 1);
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break;
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case CORGI_LCD_MODE_QVGA:
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default:
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/* Setting for QVGA */
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adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
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break;
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}
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corgi_ssp_lcdtg_send(lcd, PHACTRL_ADRS, adj);
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}
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static void corgi_lcd_power_on(struct corgi_lcd *lcd)
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{
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int comadj;
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/* Initialize Internal Logic & Port */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS,
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PICTRL_POWER_DOWN | PICTRL_INIOFF |
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PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF |
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PICTRL_DAC_SIGNAL_OFF);
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF |
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POWER0_COM_OFF | POWER0_VCC5_OFF);
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
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/* VDD(+8V), SVSS(-4V) ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
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mdelay(3);
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/* DAC ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
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POWER0_COM_OFF | POWER0_VCC5_OFF);
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/* INIB = H, INI = L */
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/* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS,
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PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
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/* Set Common Voltage */
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comadj = sharpsl_param.comadj;
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if (comadj < 0)
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comadj = DEFAULT_COMADJ;
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lcdtg_set_common_voltage(lcd, POWER0_DAC_ON | POWER0_COM_OFF |
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POWER0_VCC5_OFF, comadj);
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/* VCC5 ON, DAC ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
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POWER0_COM_OFF | POWER0_VCC5_ON);
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/* GVSS(-8V) ON, VDD ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
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mdelay(2);
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/* COM SIGNAL ON (PICTL[3] = L) */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS, PICTRL_INIT_STATE);
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/* COM ON, DAC ON, VCC5_ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
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POWER0_COM_ON | POWER0_VCC5_ON);
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/* VW ON, GVSS ON, VDD ON */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
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/* Signals output enable */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS, 0);
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/* Set Phase Adjust */
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lcdtg_set_phadadj(lcd, lcd->mode);
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/* Initialize for Input Signals from ATI */
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corgi_ssp_lcdtg_send(lcd, POLCTRL_ADRS,
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POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE |
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POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L |
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POLCTRL_EN_ACT_H);
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udelay(1000);
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switch (lcd->mode) {
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case CORGI_LCD_MODE_VGA:
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corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_VGA);
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break;
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case CORGI_LCD_MODE_QVGA:
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default:
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corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_QVGA);
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break;
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}
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}
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static void corgi_lcd_power_off(struct corgi_lcd *lcd)
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{
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/* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
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msleep(34);
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/* (1)VW OFF */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
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/* (2)COM OFF */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
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/* (3)Set Common Voltage Bias 0V */
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lcdtg_set_common_voltage(lcd, POWER0_DAC_ON | POWER0_COM_OFF |
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POWER0_VCC5_ON, 0);
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/* (4)GVSS OFF */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
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/* (5)VCC5 OFF */
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
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/* (6)Set PDWN, INIOFF, DACOFF */
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corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS,
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PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
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PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
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/* (7)DAC OFF */
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corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
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POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
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/* (8)VDD OFF */
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corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
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POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
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}
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static int corgi_lcd_set_mode(struct lcd_device *ld, struct fb_videomode *m)
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{
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struct corgi_lcd *lcd = lcd_get_data(ld);
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int mode = CORGI_LCD_MODE_QVGA;
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if (m->xres == 640 || m->xres == 480)
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mode = CORGI_LCD_MODE_VGA;
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if (lcd->mode == mode)
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return 0;
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lcdtg_set_phadadj(lcd, mode);
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switch (mode) {
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case CORGI_LCD_MODE_VGA:
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corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_VGA);
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break;
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case CORGI_LCD_MODE_QVGA:
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default:
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corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_QVGA);
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break;
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}
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lcd->mode = mode;
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return 0;
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}
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static int corgi_lcd_set_power(struct lcd_device *ld, int power)
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{
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struct corgi_lcd *lcd = lcd_get_data(ld);
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if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
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corgi_lcd_power_on(lcd);
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if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
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corgi_lcd_power_off(lcd);
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lcd->power = power;
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return 0;
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}
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static int corgi_lcd_get_power(struct lcd_device *ld)
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{
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struct corgi_lcd *lcd = lcd_get_data(ld);
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return lcd->power;
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}
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static struct lcd_ops corgi_lcd_ops = {
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.get_power = corgi_lcd_get_power,
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.set_power = corgi_lcd_set_power,
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.set_mode = corgi_lcd_set_mode,
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};
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static int corgi_bl_get_intensity(struct backlight_device *bd)
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{
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struct corgi_lcd *lcd = bl_get_data(bd);
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return lcd->intensity;
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}
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static int corgi_bl_set_intensity(struct corgi_lcd *lcd, int intensity)
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{
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int cont;
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if (intensity > 0x10)
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intensity += 0x10;
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corgi_ssp_lcdtg_send(lcd, DUTYCTRL_ADRS, intensity);
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/* Bit 5 via GPIO_BACKLIGHT_CONT */
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cont = !!(intensity & 0x20) ^ lcd->gpio_backlight_cont_inverted;
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if (gpio_is_valid(lcd->gpio_backlight_cont))
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gpio_set_value_cansleep(lcd->gpio_backlight_cont, cont);
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if (gpio_is_valid(lcd->gpio_backlight_on))
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gpio_set_value_cansleep(lcd->gpio_backlight_on, intensity);
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if (lcd->kick_battery)
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lcd->kick_battery();
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lcd->intensity = intensity;
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return 0;
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}
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static int corgi_bl_update_status(struct backlight_device *bd)
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{
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struct corgi_lcd *lcd = bl_get_data(bd);
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int intensity = bd->props.brightness;
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if (bd->props.power != FB_BLANK_UNBLANK)
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intensity = 0;
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if (bd->props.fb_blank != FB_BLANK_UNBLANK)
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intensity = 0;
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if (corgibl_flags & CORGIBL_SUSPENDED)
|
|
intensity = 0;
|
|
|
|
if ((corgibl_flags & CORGIBL_BATTLOW) && intensity > lcd->limit_mask)
|
|
intensity = lcd->limit_mask;
|
|
|
|
return corgi_bl_set_intensity(lcd, intensity);
|
|
}
|
|
|
|
void corgi_lcd_limit_intensity(int limit)
|
|
{
|
|
if (limit)
|
|
corgibl_flags |= CORGIBL_BATTLOW;
|
|
else
|
|
corgibl_flags &= ~CORGIBL_BATTLOW;
|
|
|
|
backlight_update_status(the_corgi_lcd->bl_dev);
|
|
}
|
|
EXPORT_SYMBOL(corgi_lcd_limit_intensity);
|
|
|
|
static const struct backlight_ops corgi_bl_ops = {
|
|
.get_brightness = corgi_bl_get_intensity,
|
|
.update_status = corgi_bl_update_status,
|
|
};
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int corgi_lcd_suspend(struct device *dev)
|
|
{
|
|
struct corgi_lcd *lcd = dev_get_drvdata(dev);
|
|
|
|
corgibl_flags |= CORGIBL_SUSPENDED;
|
|
corgi_bl_set_intensity(lcd, 0);
|
|
corgi_lcd_set_power(lcd->lcd_dev, FB_BLANK_POWERDOWN);
|
|
return 0;
|
|
}
|
|
|
|
static int corgi_lcd_resume(struct device *dev)
|
|
{
|
|
struct corgi_lcd *lcd = dev_get_drvdata(dev);
|
|
|
|
corgibl_flags &= ~CORGIBL_SUSPENDED;
|
|
corgi_lcd_set_power(lcd->lcd_dev, FB_BLANK_UNBLANK);
|
|
backlight_update_status(lcd->bl_dev);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(corgi_lcd_pm_ops, corgi_lcd_suspend, corgi_lcd_resume);
|
|
|
|
static int setup_gpio_backlight(struct corgi_lcd *lcd,
|
|
struct corgi_lcd_platform_data *pdata)
|
|
{
|
|
struct spi_device *spi = lcd->spi_dev;
|
|
int err;
|
|
|
|
lcd->gpio_backlight_on = -1;
|
|
lcd->gpio_backlight_cont = -1;
|
|
|
|
if (gpio_is_valid(pdata->gpio_backlight_on)) {
|
|
err = devm_gpio_request(&spi->dev, pdata->gpio_backlight_on,
|
|
"BL_ON");
|
|
if (err) {
|
|
dev_err(&spi->dev,
|
|
"failed to request GPIO%d for backlight_on\n",
|
|
pdata->gpio_backlight_on);
|
|
return err;
|
|
}
|
|
|
|
lcd->gpio_backlight_on = pdata->gpio_backlight_on;
|
|
gpio_direction_output(lcd->gpio_backlight_on, 0);
|
|
}
|
|
|
|
if (gpio_is_valid(pdata->gpio_backlight_cont)) {
|
|
err = devm_gpio_request(&spi->dev, pdata->gpio_backlight_cont,
|
|
"BL_CONT");
|
|
if (err) {
|
|
dev_err(&spi->dev,
|
|
"failed to request GPIO%d for backlight_cont\n",
|
|
pdata->gpio_backlight_cont);
|
|
return err;
|
|
}
|
|
|
|
lcd->gpio_backlight_cont = pdata->gpio_backlight_cont;
|
|
|
|
/* spitz and akita use both GPIOs for backlight, and
|
|
* have inverted polarity of GPIO_BACKLIGHT_CONT
|
|
*/
|
|
if (gpio_is_valid(lcd->gpio_backlight_on)) {
|
|
lcd->gpio_backlight_cont_inverted = 1;
|
|
gpio_direction_output(lcd->gpio_backlight_cont, 1);
|
|
} else {
|
|
lcd->gpio_backlight_cont_inverted = 0;
|
|
gpio_direction_output(lcd->gpio_backlight_cont, 0);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int corgi_lcd_probe(struct spi_device *spi)
|
|
{
|
|
struct backlight_properties props;
|
|
struct corgi_lcd_platform_data *pdata = dev_get_platdata(&spi->dev);
|
|
struct corgi_lcd *lcd;
|
|
int ret = 0;
|
|
|
|
if (pdata == NULL) {
|
|
dev_err(&spi->dev, "platform data not available\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
lcd = devm_kzalloc(&spi->dev, sizeof(struct corgi_lcd), GFP_KERNEL);
|
|
if (!lcd)
|
|
return -ENOMEM;
|
|
|
|
lcd->spi_dev = spi;
|
|
|
|
lcd->lcd_dev = devm_lcd_device_register(&spi->dev, "corgi_lcd",
|
|
&spi->dev, lcd, &corgi_lcd_ops);
|
|
if (IS_ERR(lcd->lcd_dev))
|
|
return PTR_ERR(lcd->lcd_dev);
|
|
|
|
lcd->power = FB_BLANK_POWERDOWN;
|
|
lcd->mode = (pdata) ? pdata->init_mode : CORGI_LCD_MODE_VGA;
|
|
|
|
memset(&props, 0, sizeof(struct backlight_properties));
|
|
props.type = BACKLIGHT_RAW;
|
|
props.max_brightness = pdata->max_intensity;
|
|
lcd->bl_dev = devm_backlight_device_register(&spi->dev, "corgi_bl",
|
|
&spi->dev, lcd, &corgi_bl_ops,
|
|
&props);
|
|
if (IS_ERR(lcd->bl_dev))
|
|
return PTR_ERR(lcd->bl_dev);
|
|
|
|
lcd->bl_dev->props.brightness = pdata->default_intensity;
|
|
lcd->bl_dev->props.power = FB_BLANK_UNBLANK;
|
|
|
|
ret = setup_gpio_backlight(lcd, pdata);
|
|
if (ret)
|
|
return ret;
|
|
|
|
lcd->kick_battery = pdata->kick_battery;
|
|
|
|
spi_set_drvdata(spi, lcd);
|
|
corgi_lcd_set_power(lcd->lcd_dev, FB_BLANK_UNBLANK);
|
|
backlight_update_status(lcd->bl_dev);
|
|
|
|
lcd->limit_mask = pdata->limit_mask;
|
|
the_corgi_lcd = lcd;
|
|
return 0;
|
|
}
|
|
|
|
static int corgi_lcd_remove(struct spi_device *spi)
|
|
{
|
|
struct corgi_lcd *lcd = spi_get_drvdata(spi);
|
|
|
|
lcd->bl_dev->props.power = FB_BLANK_UNBLANK;
|
|
lcd->bl_dev->props.brightness = 0;
|
|
backlight_update_status(lcd->bl_dev);
|
|
corgi_lcd_set_power(lcd->lcd_dev, FB_BLANK_POWERDOWN);
|
|
return 0;
|
|
}
|
|
|
|
static struct spi_driver corgi_lcd_driver = {
|
|
.driver = {
|
|
.name = "corgi-lcd",
|
|
.owner = THIS_MODULE,
|
|
.pm = &corgi_lcd_pm_ops,
|
|
},
|
|
.probe = corgi_lcd_probe,
|
|
.remove = corgi_lcd_remove,
|
|
};
|
|
|
|
module_spi_driver(corgi_lcd_driver);
|
|
|
|
MODULE_DESCRIPTION("LCD and backlight driver for SHARP C7x0/Cxx00");
|
|
MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("spi:corgi-lcd");
|