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60815cf2e0
As discussed on LKML http://marc.info/?i=54611D86.4040306%40de.ibm.com ACCESS_ONCE might fail with specific compilers for non-scalar accesses. Here is a set of patches to tackle that problem. The first patch introduce READ_ONCE and ASSIGN_ONCE. If the data structure is larger than the machine word size memcpy is used and a warning is emitted. The next patches fix up several in-tree users of ACCESS_ONCE on non-scalar types. This merge does not yet contain a patch that forces ACCESS_ONCE to work only on scalar types. This is targetted for the next merge window as Linux next already contains new offenders regarding ACCESS_ONCE vs. non-scalar types. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iQIcBAABAgAGBQJUkrVGAAoJEBF7vIC1phx8stkP/2LmN5y6LOseoEW06xa5MX4m cbIKsZNtsGHl7EDcTzzuWs6Sq5/Cj7V3yzeBF7QGbUKOqvFWU3jvpUBCCfjMg37C 77/Vf0ZPrxTXXxeJ4Ykdy2CGvuMtuYY9TWkrRNKmLU0xex7lGblEzCt9z6+mZviw 26/DN8ctjkHRvIUAi+7RfQBBc3oSMYAC1mzxYKBAsAFLV+LyFmsGU/4iofZMAsdt XFyVXlrLn0Bjx/MeceGkOlMDiVx4FnfccfFaD4hhuTLBJXWitkUK/MRa4JBiXWzH agY8942A8/j9wkI2DFp/pqZYqA/sTXLndyOWlhE//ZSti0n0BSJaOx3S27rTLkAc 5VmZEVyIrS3hyOpyyAi0sSoPkDnjeCHmQg9Rqn34/poKLd7JDrW2UkERNCf/T3eh GI2rbhAlZz3v5mIShn8RrxzslWYmOObpMr3HYNUdRk8YUfTf6d6aZ3txHp2nP4mD VBAEzsvP9rcVT2caVhU2dnBzeaZAj3zeDxBtjcb3X2osY9tI7qgLc9Fa/fWKgILk 2evkLcctsae2mlLNGHyaK3Dm/ZmYJv+57MyaQQEZNfZZgeB1y4k0DkxH4w1CFmCi s8XlH5voEHgnyjSQXXgc/PNVlkPAKr78ZyTiAfiKmh8rpe41/W4hGcgao7L9Lgiu SI0uSwKibuZt4dHGxQuG =IQ5o -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux Pull ACCESS_ONCE cleanup preparation from Christian Borntraeger: "kernel: Provide READ_ONCE and ASSIGN_ONCE As discussed on LKML http://marc.info/?i=54611D86.4040306%40de.ibm.com ACCESS_ONCE might fail with specific compilers for non-scalar accesses. Here is a set of patches to tackle that problem. The first patch introduce READ_ONCE and ASSIGN_ONCE. If the data structure is larger than the machine word size memcpy is used and a warning is emitted. The next patches fix up several in-tree users of ACCESS_ONCE on non-scalar types. This does not yet contain a patch that forces ACCESS_ONCE to work only on scalar types. This is targetted for the next merge window as Linux next already contains new offenders regarding ACCESS_ONCE vs. non-scalar types" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux: s390/kvm: REPLACE barrier fixup with READ_ONCE arm/spinlock: Replace ACCESS_ONCE with READ_ONCE arm64/spinlock: Replace ACCESS_ONCE READ_ONCE mips/gup: Replace ACCESS_ONCE with READ_ONCE x86/gup: Replace ACCESS_ONCE with READ_ONCE x86/spinlock: Replace ACCESS_ONCE with READ_ONCE mm: replace ACCESS_ONCE with READ_ONCE or barriers kernel: Provide READ_ONCE and ASSIGN_ONCE
226 lines
6.1 KiB
C
226 lines
6.1 KiB
C
#ifndef _ASM_X86_SPINLOCK_H
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#define _ASM_X86_SPINLOCK_H
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#include <linux/jump_label.h>
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#include <linux/atomic.h>
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#include <asm/page.h>
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#include <asm/processor.h>
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#include <linux/compiler.h>
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#include <asm/paravirt.h>
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#include <asm/bitops.h>
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/*
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* Your basic SMP spinlocks, allowing only a single CPU anywhere
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*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* These are fair FIFO ticket locks, which support up to 2^16 CPUs.
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*
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* (the type definitions are in asm/spinlock_types.h)
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*/
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#ifdef CONFIG_X86_32
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# define LOCK_PTR_REG "a"
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#else
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# define LOCK_PTR_REG "D"
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#endif
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#if defined(CONFIG_X86_32) && (defined(CONFIG_X86_PPRO_FENCE))
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/*
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* On PPro SMP, we use a locked operation to unlock
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* (PPro errata 66, 92)
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*/
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# define UNLOCK_LOCK_PREFIX LOCK_PREFIX
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#else
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# define UNLOCK_LOCK_PREFIX
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#endif
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/* How long a lock should spin before we consider blocking */
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#define SPIN_THRESHOLD (1 << 15)
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extern struct static_key paravirt_ticketlocks_enabled;
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static __always_inline bool static_key_false(struct static_key *key);
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#ifdef CONFIG_PARAVIRT_SPINLOCKS
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static inline void __ticket_enter_slowpath(arch_spinlock_t *lock)
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{
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set_bit(0, (volatile unsigned long *)&lock->tickets.tail);
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}
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#else /* !CONFIG_PARAVIRT_SPINLOCKS */
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static __always_inline void __ticket_lock_spinning(arch_spinlock_t *lock,
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__ticket_t ticket)
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{
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}
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static inline void __ticket_unlock_kick(arch_spinlock_t *lock,
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__ticket_t ticket)
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{
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}
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#endif /* CONFIG_PARAVIRT_SPINLOCKS */
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static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
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{
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return lock.tickets.head == lock.tickets.tail;
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}
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/*
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* Ticket locks are conceptually two parts, one indicating the current head of
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* the queue, and the other indicating the current tail. The lock is acquired
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* by atomically noting the tail and incrementing it by one (thus adding
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* ourself to the queue and noting our position), then waiting until the head
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* becomes equal to the the initial value of the tail.
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*
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* We use an xadd covering *both* parts of the lock, to increment the tail and
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* also load the position of the head, which takes care of memory ordering
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* issues and should be optimal for the uncontended case. Note the tail must be
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* in the high part, because a wide xadd increment of the low part would carry
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* up and contaminate the high part.
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*/
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static __always_inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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register struct __raw_tickets inc = { .tail = TICKET_LOCK_INC };
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inc = xadd(&lock->tickets, inc);
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if (likely(inc.head == inc.tail))
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goto out;
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inc.tail &= ~TICKET_SLOWPATH_FLAG;
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for (;;) {
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unsigned count = SPIN_THRESHOLD;
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do {
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if (READ_ONCE(lock->tickets.head) == inc.tail)
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goto out;
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cpu_relax();
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} while (--count);
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__ticket_lock_spinning(lock, inc.tail);
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}
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out: barrier(); /* make sure nothing creeps before the lock is taken */
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}
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static __always_inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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arch_spinlock_t old, new;
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old.tickets = READ_ONCE(lock->tickets);
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if (old.tickets.head != (old.tickets.tail & ~TICKET_SLOWPATH_FLAG))
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return 0;
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new.head_tail = old.head_tail + (TICKET_LOCK_INC << TICKET_SHIFT);
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/* cmpxchg is a full barrier, so nothing can move before it */
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return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail;
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}
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static inline void __ticket_unlock_slowpath(arch_spinlock_t *lock,
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arch_spinlock_t old)
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{
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arch_spinlock_t new;
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BUILD_BUG_ON(((__ticket_t)NR_CPUS) != NR_CPUS);
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/* Perform the unlock on the "before" copy */
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old.tickets.head += TICKET_LOCK_INC;
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/* Clear the slowpath flag */
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new.head_tail = old.head_tail & ~(TICKET_SLOWPATH_FLAG << TICKET_SHIFT);
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/*
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* If the lock is uncontended, clear the flag - use cmpxchg in
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* case it changes behind our back though.
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*/
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if (new.tickets.head != new.tickets.tail ||
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cmpxchg(&lock->head_tail, old.head_tail,
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new.head_tail) != old.head_tail) {
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/*
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* Lock still has someone queued for it, so wake up an
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* appropriate waiter.
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*/
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__ticket_unlock_kick(lock, old.tickets.head);
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}
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}
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static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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if (TICKET_SLOWPATH_FLAG &&
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static_key_false(¶virt_ticketlocks_enabled)) {
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arch_spinlock_t prev;
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prev = *lock;
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add_smp(&lock->tickets.head, TICKET_LOCK_INC);
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/* add_smp() is a full mb() */
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if (unlikely(lock->tickets.tail & TICKET_SLOWPATH_FLAG))
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__ticket_unlock_slowpath(lock, prev);
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} else
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__add(&lock->tickets.head, TICKET_LOCK_INC, UNLOCK_LOCK_PREFIX);
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}
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static inline int arch_spin_is_locked(arch_spinlock_t *lock)
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{
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struct __raw_tickets tmp = READ_ONCE(lock->tickets);
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return tmp.tail != tmp.head;
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}
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static inline int arch_spin_is_contended(arch_spinlock_t *lock)
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{
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struct __raw_tickets tmp = READ_ONCE(lock->tickets);
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return (__ticket_t)(tmp.tail - tmp.head) > TICKET_LOCK_INC;
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}
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#define arch_spin_is_contended arch_spin_is_contended
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static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock,
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unsigned long flags)
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{
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arch_spin_lock(lock);
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}
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static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
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{
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__ticket_t head = ACCESS_ONCE(lock->tickets.head);
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for (;;) {
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struct __raw_tickets tmp = ACCESS_ONCE(lock->tickets);
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/*
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* We need to check "unlocked" in a loop, tmp.head == head
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* can be false positive because of overflow.
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*/
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if (tmp.head == (tmp.tail & ~TICKET_SLOWPATH_FLAG) ||
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tmp.head != head)
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break;
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cpu_relax();
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}
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}
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/*
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* Read-write spinlocks, allowing multiple readers
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* but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts
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* but no interrupt writers. For those circumstances we
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* can "mix" irq-safe locks - any writer needs to get a
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* irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*
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* On x86, we implement read-write locks using the generic qrwlock with
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* x86 specific optimization.
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*/
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#include <asm/qrwlock.h>
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#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
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#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
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#define arch_spin_relax(lock) cpu_relax()
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#define arch_read_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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#endif /* _ASM_X86_SPINLOCK_H */
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