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a439fe51a1
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
#ifndef _SPARC64_FUTEX_H
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#define _SPARC64_FUTEX_H
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/errno.h>
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#include <asm/system.h>
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#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile__( \
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"\n1: lduwa [%3] %%asi, %2\n" \
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" " insn "\n" \
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"2: casa [%3] %%asi, %2, %1\n" \
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" cmp %2, %1\n" \
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" bne,pn %%icc, 1b\n" \
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" mov 0, %0\n" \
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"3:\n" \
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" .section .fixup,#alloc,#execinstr\n" \
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" .align 4\n" \
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"4: sethi %%hi(3b), %0\n" \
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" jmpl %0 + %%lo(3b), %%g0\n" \
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" mov %5, %0\n" \
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" .previous\n" \
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" .section __ex_table,\"a\"\n" \
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" .align 4\n" \
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" .word 1b, 4b\n" \
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" .word 2b, 4b\n" \
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" .previous\n" \
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: "=&r" (ret), "=&r" (oldval), "=&r" (tem) \
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: "r" (uaddr), "r" (oparg), "i" (-EFAULT) \
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: "memory")
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static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret, tem;
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if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int))))
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return -EFAULT;
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if (unlikely((((unsigned long) uaddr) & 0x3UL)))
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return -EINVAL;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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__asm__ __volatile__(
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"\n1: casa [%3] %%asi, %2, %0\n"
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"2:\n"
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" .section .fixup,#alloc,#execinstr\n"
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" .align 4\n"
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"3: sethi %%hi(2b), %0\n"
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" jmpl %0 + %%lo(2b), %%g0\n"
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" mov %4, %0\n"
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" .previous\n"
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" .section __ex_table,\"a\"\n"
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" .align 4\n"
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" .word 1b, 3b\n"
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" .previous\n"
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: "=r" (newval)
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: "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT)
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: "memory");
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return newval;
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}
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#endif /* !(_SPARC64_FUTEX_H) */
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