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arch/mips/pci/ops-titan-ht.c:36: ERROR: "foo * bar" should be "foo *bar" arch/mips/pci/ops-titan-ht.c:68: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: Tejun Heo <tj@kernel.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1277/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
125 lines
3.3 KiB
C
125 lines
3.3 KiB
C
/*
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* Copyright 2003 PMC-Sierra
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* Author: Manish Lachwani (lachwani@pmc-sierra.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/titan_dep.h>
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static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn,
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int offset, u32 *val)
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{
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volatile uint32_t address;
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int busno;
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busno = bus->number;
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address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
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if (busno != 0)
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address |= 1;
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/*
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* RM9000 HT Errata: Issue back to back HT config
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* transcations. Issue a BIU sync before and
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* after the HT cycle
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*/
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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udelay(30);
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*(volatile int32_t *) 0xfb0006f8 = address;
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*(val) = *(volatile int32_t *) 0xfb0006fc;
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udelay(30);
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* (volatile int32_t *) 0xfb0000f0 |= 0x2;
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return PCIBIOS_SUCCESSFUL;
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}
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static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 *val)
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{
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uint32_t dword;
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titan_ht_config_read_dword(bus, devfn, offset, &dword);
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dword >>= ((offset & 3) << 3);
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dword &= (0xffffffffU >> ((4 - size) << 8));
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return PCIBIOS_SUCCESSFUL;
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}
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static inline int titan_ht_config_write_dword(struct pci_bus *bus,
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unsigned int devfn, int offset, u32 val)
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{
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volatile uint32_t address;
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int busno;
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busno = bus->number;
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address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
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if (busno != 0)
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address |= 1;
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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udelay(30);
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*(volatile int32_t *) 0xfb0006f8 = address;
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*(volatile int32_t *) 0xfb0006fc = val;
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udelay(30);
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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return PCIBIOS_SUCCESSFUL;
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}
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static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 val)
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{
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uint32_t val1, val2, mask;
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titan_ht_config_read_dword(bus, devfn, offset, &val2);
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val1 = val << ((offset & 3) << 3);
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mask = ~(0xffffffffU >> ((4 - size) << 8));
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val2 &= ~(mask << ((offset & 3) << 8));
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titan_ht_config_write_dword(bus, devfn, offset, val1 | val2);
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops titan_ht_pci_ops = {
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.read = titan_ht_config_read,
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.write = titan_ht_config_write,
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};
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