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AMD Seattle SATA controller mostly conforms to AHCI interface with some special register to control SGPIO interface. In the case of an AHCI controller, the SGPIO feature is ideally implemented using the "Enclosure Management" register of the AHCI controller, but those registeres are not implemented in the Seattle SoC. Instead SoC (Rev B0 onwards) provides a 32-bit SGPIO control register which should be programmed to control the activity, locate and fault LEDs. The driver is based on ahci_platform driver. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Hans de Goede <hdegoede@redhat.com> CC: tj@kernel.org CC: linux-ide@vger.kernel.org Signed-off-by: Tejun Heo <tj@kernel.org>
211 lines
5.4 KiB
C
211 lines
5.4 KiB
C
/*
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* AMD Seattle AHCI SATA driver
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*
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* Copyright (c) 2015, Advanced Micro Devices
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* Author: Brijesh Singh <brijesh.singh@amd.com>
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*
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* based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/device.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/libata.h>
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#include <linux/ahci_platform.h>
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#include <linux/acpi.h>
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#include <linux/pci_ids.h>
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#include "ahci.h"
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/* SGPIO Control Register definition
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*
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* Bit Type Description
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* 31 RW OD7.2 (activity)
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* 30 RW OD7.1 (locate)
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* 29 RW OD7.0 (fault)
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* 28...8 RW OD6.2...OD0.0 (3bits per port, 1 bit per LED)
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* 7 RO SGPIO feature flag
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* 6:4 RO Reserved
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* 3:0 RO Number of ports (0 means no port supported)
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*/
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#define ACTIVITY_BIT_POS(x) (8 + (3 * x))
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#define LOCATE_BIT_POS(x) (ACTIVITY_BIT_POS(x) + 1)
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#define FAULT_BIT_POS(x) (LOCATE_BIT_POS(x) + 1)
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#define ACTIVITY_MASK 0x00010000
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#define LOCATE_MASK 0x00080000
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#define FAULT_MASK 0x00400000
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#define DRV_NAME "ahci-seattle"
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static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
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ssize_t size);
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struct seattle_plat_data {
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void __iomem *sgpio_ctrl;
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};
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static struct ata_port_operations ahci_port_ops = {
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.inherits = &ahci_ops,
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};
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static const struct ata_port_info ahci_port_info = {
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_port_ops,
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};
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static struct ata_port_operations ahci_seattle_ops = {
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.inherits = &ahci_ops,
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.transmit_led_message = seattle_transmit_led_message,
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};
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static const struct ata_port_info ahci_port_seattle_info = {
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.flags = AHCI_FLAG_COMMON | ATA_FLAG_EM | ATA_FLAG_SW_ACTIVITY,
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.link_flags = ATA_LFLAG_SW_ACTIVITY,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_seattle_ops,
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};
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static struct scsi_host_template ahci_platform_sht = {
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AHCI_SHT(DRV_NAME),
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};
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static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
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ssize_t size)
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{
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struct ahci_host_priv *hpriv = ap->host->private_data;
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struct ahci_port_priv *pp = ap->private_data;
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struct seattle_plat_data *plat_data = hpriv->plat_data;
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unsigned long flags;
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int pmp;
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struct ahci_em_priv *emp;
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u32 val;
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/* get the slot number from the message */
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pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
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if (pmp >= EM_MAX_SLOTS)
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return -EINVAL;
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emp = &pp->em_priv[pmp];
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val = ioread32(plat_data->sgpio_ctrl);
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if (state & ACTIVITY_MASK)
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val |= 1 << ACTIVITY_BIT_POS((ap->port_no));
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else
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val &= ~(1 << ACTIVITY_BIT_POS((ap->port_no)));
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if (state & LOCATE_MASK)
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val |= 1 << LOCATE_BIT_POS((ap->port_no));
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else
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val &= ~(1 << LOCATE_BIT_POS((ap->port_no)));
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if (state & FAULT_MASK)
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val |= 1 << FAULT_BIT_POS((ap->port_no));
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else
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val &= ~(1 << FAULT_BIT_POS((ap->port_no)));
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iowrite32(val, plat_data->sgpio_ctrl);
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spin_lock_irqsave(ap->lock, flags);
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/* save off new led state for port/slot */
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emp->led_state = state;
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spin_unlock_irqrestore(ap->lock, flags);
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return size;
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}
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static const struct ata_port_info *ahci_seattle_get_port_info(
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struct platform_device *pdev, struct ahci_host_priv *hpriv)
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{
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struct device *dev = &pdev->dev;
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struct seattle_plat_data *plat_data;
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u32 val;
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plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL);
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if (IS_ERR(plat_data))
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return &ahci_port_info;
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plat_data->sgpio_ctrl = devm_ioremap_resource(dev,
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platform_get_resource(pdev, IORESOURCE_MEM, 1));
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if (IS_ERR(plat_data->sgpio_ctrl))
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return &ahci_port_info;
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val = ioread32(plat_data->sgpio_ctrl);
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if (!(val & 0xf))
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return &ahci_port_info;
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hpriv->em_loc = 0;
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hpriv->em_buf_sz = 4;
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hpriv->em_msg_type = EM_MSG_TYPE_LED;
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hpriv->plat_data = plat_data;
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dev_info(dev, "SGPIO LED control is enabled.\n");
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return &ahci_port_seattle_info;
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}
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static int ahci_seattle_probe(struct platform_device *pdev)
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{
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int rc;
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struct ahci_host_priv *hpriv;
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hpriv = ahci_platform_get_resources(pdev);
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if (IS_ERR(hpriv))
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return PTR_ERR(hpriv);
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rc = ahci_platform_enable_resources(hpriv);
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if (rc)
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return rc;
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rc = ahci_platform_init_host(pdev, hpriv,
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ahci_seattle_get_port_info(pdev, hpriv),
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&ahci_platform_sht);
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if (rc)
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goto disable_resources;
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return 0;
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disable_resources:
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ahci_platform_disable_resources(hpriv);
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return rc;
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}
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static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
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ahci_platform_resume);
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static const struct acpi_device_id ahci_acpi_match[] = {
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{ "AMDI0600", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
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static struct platform_driver ahci_seattle_driver = {
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.probe = ahci_seattle_probe,
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.remove = ata_platform_remove_one,
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.driver = {
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.name = DRV_NAME,
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.acpi_match_table = ahci_acpi_match,
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.pm = &ahci_pm_ops,
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},
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};
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module_platform_driver(ahci_seattle_driver);
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MODULE_DESCRIPTION("Seattle AHCI SATA platform driver");
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MODULE_AUTHOR("Brijesh Singh <brijesh.singh@amd.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:" DRV_NAME);
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