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d7d488f41b
Change 'defineable' to 'definable'. Change 'paramater' to 'parameter'. Signed-off-by: Zhang Jiaming <jiaming@nfschina.com> Reviewed-by: Benjamin Block <bblock@linux.ibm.com> Link: https://lore.kernel.org/r/20220623060543.12870-1-jiaming@nfschina.com Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
365 lines
9.9 KiB
C
365 lines
9.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 2000, 2008
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* Author(s): Utz Bacher <utz.bacher@de.ibm.com>
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*
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*/
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#ifndef __QDIO_H__
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#define __QDIO_H__
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#include <linux/interrupt.h>
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#include <asm/cio.h>
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#include <asm/ccwdev.h>
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/* only use 4 queues to save some cachelines */
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#define QDIO_MAX_QUEUES_PER_IRQ 4
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#define QDIO_MAX_BUFFERS_PER_Q 128
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#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
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#define QDIO_BUFNR(num) ((num) & QDIO_MAX_BUFFERS_MASK)
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#define QDIO_MAX_ELEMENTS_PER_BUFFER 16
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#define QDIO_QETH_QFMT 0
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#define QDIO_ZFCP_QFMT 1
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#define QDIO_IQDIO_QFMT 2
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/**
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* struct qdesfmt0 - queue descriptor, format 0
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* @sliba: absolute address of storage list information block
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* @sla: absolute address of storage list
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* @slsba: absolute address of storage list state block
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* @akey: access key for SLIB
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* @bkey: access key for SL
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* @ckey: access key for SBALs
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* @dkey: access key for SLSB
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*/
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struct qdesfmt0 {
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u64 sliba;
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u64 sla;
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u64 slsba;
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u32 : 32;
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u32 akey : 4;
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u32 bkey : 4;
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u32 ckey : 4;
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u32 dkey : 4;
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u32 : 16;
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} __attribute__ ((packed));
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#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
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/**
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* struct qdr - queue description record (QDR)
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* @qfmt: queue format
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* @ac: adapter characteristics
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* @iqdcnt: input queue descriptor count
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* @oqdcnt: output queue descriptor count
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* @iqdsz: input queue descriptor size
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* @oqdsz: output queue descriptor size
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* @qiba: absolute address of queue information block
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* @qkey: queue information block key
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* @qdf0: queue descriptions
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*/
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struct qdr {
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u32 qfmt : 8;
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u32 : 16;
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u32 ac : 8;
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u32 : 8;
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u32 iqdcnt : 8;
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u32 : 8;
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u32 oqdcnt : 8;
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u32 : 8;
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u32 iqdsz : 8;
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u32 : 8;
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u32 oqdsz : 8;
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/* private: */
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u32 res[9];
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/* public: */
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u64 qiba;
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u32 : 32;
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u32 qkey : 4;
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u32 : 28;
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struct qdesfmt0 qdf0[126];
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} __packed __aligned(PAGE_SIZE);
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#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
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#define QIB_RFLAGS_ENABLE_QEBSM 0x80
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#define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
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/**
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* struct qib - queue information block (QIB)
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* @qfmt: queue format
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* @pfmt: implementation dependent parameter format
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* @rflags: QEBSM
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* @ac: adapter characteristics
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* @isliba: logical address of first input SLIB
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* @osliba: logical address of first output SLIB
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* @ebcnam: adapter identifier in EBCDIC
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* @parm: implementation dependent parameters
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*/
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struct qib {
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u32 qfmt : 8;
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u32 pfmt : 8;
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u32 rflags : 8;
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u32 ac : 8;
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u32 : 32;
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u64 isliba;
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u64 osliba;
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u32 : 32;
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u32 : 32;
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u8 ebcnam[8];
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/* private: */
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u8 res[88];
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/* public: */
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u8 parm[128];
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} __attribute__ ((packed, aligned(256)));
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/**
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* struct slibe - storage list information block element (SLIBE)
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* @parms: implementation dependent parameters
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*/
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struct slibe {
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u64 parms;
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};
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/**
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* struct qaob - queue asynchronous operation block
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* @res0: reserved parameters
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* @res1: reserved parameter
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* @res2: reserved parameter
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* @res3: reserved parameter
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* @aorc: asynchronous operation return code
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* @flags: internal flags
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* @cbtbs: control block type
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* @sb_count: number of storage blocks
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* @sba: storage block element addresses
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* @dcount: size of storage block elements
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* @user0: user definable value
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* @res4: reserved parameter
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* @user1: user definable value
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*/
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struct qaob {
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u64 res0[6];
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u8 res1;
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u8 res2;
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u8 res3;
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u8 aorc;
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u8 flags;
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u16 cbtbs;
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u8 sb_count;
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u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
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u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
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u64 user0;
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u64 res4[2];
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u8 user1[16];
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} __attribute__ ((packed, aligned(256)));
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/**
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* struct slib - storage list information block (SLIB)
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* @nsliba: next SLIB address (if any)
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* @sla: SL address
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* @slsba: SLSB address
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* @slibe: SLIB elements
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*/
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struct slib {
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u64 nsliba;
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u64 sla;
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u64 slsba;
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/* private: */
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u8 res[1000];
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/* public: */
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struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
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} __attribute__ ((packed, aligned(2048)));
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#define SBAL_EFLAGS_LAST_ENTRY 0x40
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#define SBAL_EFLAGS_CONTIGUOUS 0x20
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#define SBAL_EFLAGS_FIRST_FRAG 0x04
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#define SBAL_EFLAGS_MIDDLE_FRAG 0x08
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#define SBAL_EFLAGS_LAST_FRAG 0x0c
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#define SBAL_EFLAGS_MASK 0x6f
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#define SBAL_SFLAGS0_PCI_REQ 0x40
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#define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
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/* Awesome OpenFCP extensions */
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#define SBAL_SFLAGS0_TYPE_STATUS 0x00
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#define SBAL_SFLAGS0_TYPE_WRITE 0x08
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#define SBAL_SFLAGS0_TYPE_READ 0x10
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#define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
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#define SBAL_SFLAGS0_MORE_SBALS 0x04
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#define SBAL_SFLAGS0_COMMAND 0x02
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#define SBAL_SFLAGS0_LAST_SBAL 0x00
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#define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
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#define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
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#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
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/**
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* struct qdio_buffer_element - SBAL entry
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* @eflags: SBAL entry flags
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* @scount: SBAL count
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* @sflags: whole SBAL flags
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* @length: length
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* @addr: absolute data address
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*/
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struct qdio_buffer_element {
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u8 eflags;
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/* private: */
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u8 res1;
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/* public: */
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u8 scount;
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u8 sflags;
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u32 length;
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u64 addr;
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} __attribute__ ((packed, aligned(16)));
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/**
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* struct qdio_buffer - storage block address list (SBAL)
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* @element: SBAL entries
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*/
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struct qdio_buffer {
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struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
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} __attribute__ ((packed, aligned(256)));
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/**
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* struct sl_element - storage list entry
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* @sbal: absolute SBAL address
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*/
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struct sl_element {
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u64 sbal;
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} __attribute__ ((packed));
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/**
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* struct sl - storage list (SL)
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* @element: SL entries
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*/
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struct sl {
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struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
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} __attribute__ ((packed, aligned(1024)));
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/**
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* struct slsb - storage list state block (SLSB)
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* @val: state per buffer
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*/
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struct slsb {
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u8 val[QDIO_MAX_BUFFERS_PER_Q];
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} __attribute__ ((packed, aligned(256)));
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/* qdio adapter-characteristics-1 flag */
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#define CHSC_AC1_INITIATE_INPUTQ 0x80
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#define AC1_SIGA_INPUT_NEEDED 0x40 /* process input queues */
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#define AC1_SIGA_OUTPUT_NEEDED 0x20 /* process output queues */
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#define AC1_SIGA_SYNC_NEEDED 0x10 /* ask hypervisor to sync */
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#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08 /* set by hypervisor */
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#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04 /* set by hypervisor */
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#define AC1_SC_QEBSM_AVAILABLE 0x02 /* available for subchannel */
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#define AC1_SC_QEBSM_ENABLED 0x01 /* enabled for subchannel */
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#define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
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#define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
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#define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
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#define CHSC_AC2_SNIFFER_AVAILABLE 0x0008
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#define CHSC_AC2_DATA_DIV_ENABLED 0x0002
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#define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
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struct qdio_ssqd_desc {
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u8 flags;
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u8:8;
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u16 sch;
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u8 qfmt;
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u8 parm;
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u8 qdioac1;
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u8 sch_class;
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u8 pcnt;
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u8 icnt;
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u8:8;
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u8 ocnt;
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u8:8;
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u8 mbccnt;
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u16 qdioac2;
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u64 sch_token;
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u8 mro;
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u8 mri;
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u16 qdioac3;
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u16:16;
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u8:8;
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u8 mmwc;
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} __attribute__ ((packed));
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/* params are: ccw_device, qdio_error, queue_number,
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first element processed, number of elements processed, int_parm */
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typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
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int, int, unsigned long);
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/* qdio errors reported through the queue handlers: */
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#define QDIO_ERROR_ACTIVATE 0x0001
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#define QDIO_ERROR_GET_BUF_STATE 0x0002
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#define QDIO_ERROR_SET_BUF_STATE 0x0004
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/* extra info for completed SBALs: */
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#define QDIO_ERROR_SLSB_STATE 0x0100
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#define QDIO_ERROR_SLSB_PENDING 0x0200
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/* for qdio_cleanup */
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#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
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#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
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/**
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* struct qdio_initialize - qdio initialization data
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* @q_format: queue format
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* @qdr_ac: feature flags to set
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* @qib_param_field_format: format for qib_parm_field
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* @qib_param_field: pointer to 128 bytes or NULL, if no param field
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* @qib_rflags: rflags to set
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* @no_input_qs: number of input queues
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* @no_output_qs: number of output queues
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* @input_handler: handler to be called for input queues, and device-wide errors
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* @output_handler: handler to be called for output queues
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* @irq_poll: Data IRQ polling handler
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* @scan_threshold: # of in-use buffers that triggers scan on output queue
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* @int_parm: interruption parameter
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* @input_sbal_addr_array: per-queue array, each element points to 128 SBALs
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* @output_sbal_addr_array: per-queue array, each element points to 128 SBALs
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*/
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struct qdio_initialize {
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unsigned char q_format;
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unsigned char qdr_ac;
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unsigned int qib_param_field_format;
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unsigned char *qib_param_field;
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unsigned char qib_rflags;
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unsigned int no_input_qs;
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unsigned int no_output_qs;
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qdio_handler_t *input_handler;
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qdio_handler_t *output_handler;
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void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
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unsigned long int_parm;
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struct qdio_buffer ***input_sbal_addr_array;
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struct qdio_buffer ***output_sbal_addr_array;
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};
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int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
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void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
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void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
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extern int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
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unsigned int no_output_qs);
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extern int qdio_establish(struct ccw_device *cdev,
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struct qdio_initialize *init_data);
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extern int qdio_activate(struct ccw_device *);
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extern int qdio_start_irq(struct ccw_device *cdev);
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extern int qdio_stop_irq(struct ccw_device *cdev);
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extern int qdio_inspect_input_queue(struct ccw_device *cdev, unsigned int nr,
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unsigned int *bufnr, unsigned int *error);
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extern int qdio_inspect_output_queue(struct ccw_device *cdev, unsigned int nr,
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unsigned int *bufnr, unsigned int *error);
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extern int qdio_add_bufs_to_input_queue(struct ccw_device *cdev,
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unsigned int q_nr, unsigned int bufnr,
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unsigned int count);
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extern int qdio_add_bufs_to_output_queue(struct ccw_device *cdev,
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unsigned int q_nr, unsigned int bufnr,
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unsigned int count, struct qaob *aob);
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extern int qdio_shutdown(struct ccw_device *, int);
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extern int qdio_free(struct ccw_device *);
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extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
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#endif /* __QDIO_H__ */
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