mirror of
https://github.com/torvalds/linux.git
synced 2024-12-28 13:51:44 +00:00
9ff3036a60
Currently the 'big-endian' property is listed as required, which is not correct. i.MX SoCs do not need such property, so move it under 'Optional properties' entry instead. Also, fsl-sai.txt incorrectly referenced 'FTM_PWM registers', so change it to 'SAI registers', which is the intended description. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
65 lines
1.9 KiB
Plaintext
65 lines
1.9 KiB
Plaintext
Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
|
|
|
|
The Freescale S/PDIF audio block is a stereo transceiver that allows the
|
|
processor to receive and transmit digital audio via an coaxial cable or
|
|
a fibre cable.
|
|
|
|
Required properties:
|
|
|
|
- compatible : Compatible list, must contain "fsl,imx35-spdif".
|
|
|
|
- reg : Offset and length of the register set for the device.
|
|
|
|
- interrupts : Contains the spdif interrupt.
|
|
|
|
- dmas : Generic dma devicetree binding as described in
|
|
Documentation/devicetree/bindings/dma/dma.txt.
|
|
|
|
- dma-names : Two dmas have to be defined, "tx" and "rx".
|
|
|
|
- clocks : Contains an entry for each entry in clock-names.
|
|
|
|
- clock-names : Includes the following entries:
|
|
"core" The core clock of spdif controller.
|
|
"rxtx<0-7>" Clock source list for tx and rx clock.
|
|
This clock list should be identical to the source
|
|
list connecting to the spdif clock mux in "SPDIF
|
|
Transceiver Clock Diagram" of SoC reference manual.
|
|
It can also be referred to TxClk_Source bit of
|
|
register SPDIF_STC.
|
|
"spba" The spba clock is required when SPDIF is placed as a
|
|
bus slave of the Shared Peripheral Bus and when two
|
|
or more bus masters (CPU, DMA or DSP) try to access
|
|
it. This property is optional depending on the SoC
|
|
design.
|
|
|
|
Optional properties:
|
|
|
|
- big-endian : If this property is absent, the native endian mode
|
|
will be in use as default, or the big endian mode
|
|
will be in use for all the device registers.
|
|
|
|
Example:
|
|
|
|
spdif: spdif@2004000 {
|
|
compatible = "fsl,imx35-spdif";
|
|
reg = <0x02004000 0x4000>;
|
|
interrupts = <0 52 0x04>;
|
|
dmas = <&sdma 14 18 0>,
|
|
<&sdma 15 18 0>;
|
|
dma-names = "rx", "tx";
|
|
|
|
clocks = <&clks 197>, <&clks 3>,
|
|
<&clks 197>, <&clks 107>,
|
|
<&clks 0>, <&clks 118>,
|
|
<&clks 62>, <&clks 139>,
|
|
<&clks 0>;
|
|
clock-names = "core", "rxtx0",
|
|
"rxtx1", "rxtx2",
|
|
"rxtx3", "rxtx4",
|
|
"rxtx5", "rxtx6",
|
|
"rxtx7";
|
|
|
|
big-endian;
|
|
};
|