mirror of
https://github.com/torvalds/linux.git
synced 2024-12-28 13:51:44 +00:00
dea54fbad3
This driver starts the DWC2 core(s) built into the XWAY SoCs and provides the PHY interfaces for each core. The phy instances can be passed to the dwc2 driver, which already supports the generic phy interface. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17127/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
41 lines
1.3 KiB
Plaintext
41 lines
1.3 KiB
Plaintext
Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
|
|
===========================================
|
|
|
|
This binding describes the USB PHY hardware provided by the RCU module on the
|
|
Lantiq XWAY SoCs.
|
|
|
|
This node has to be a sub node of the Lantiq RCU block.
|
|
|
|
-------------------------------------------------------------------------------
|
|
Required properties (controller (parent) node):
|
|
- compatible : Should be one of
|
|
"lantiq,ase-usb2-phy"
|
|
"lantiq,danube-usb2-phy"
|
|
"lantiq,xrx100-usb2-phy"
|
|
"lantiq,xrx200-usb2-phy"
|
|
"lantiq,xrx300-usb2-phy"
|
|
- reg : Defines the following sets of registers in the parent
|
|
syscon device
|
|
- Offset of the USB PHY configuration register
|
|
- Offset of the USB Analog configuration
|
|
register (only for xrx200 and xrx200)
|
|
- clocks : References to the (PMU) "phy" clk gate.
|
|
- clock-names : Must be "phy"
|
|
- resets : References to the RCU USB configuration reset bits.
|
|
- reset-names : Must be one of the following:
|
|
"phy" (optional)
|
|
"ctrl" (shared)
|
|
|
|
-------------------------------------------------------------------------------
|
|
Example for the USB PHYs on an xRX200 SoC:
|
|
usb_phy0: usb2-phy@18 {
|
|
compatible = "lantiq,xrx200-usb2-phy";
|
|
reg = <0x18 4>, <0x38 4>;
|
|
|
|
clocks = <&pmu PMU_GATE_USB0_PHY>;
|
|
clock-names = "phy";
|
|
resets = <&reset1 4 4>, <&reset0 4 4>;
|
|
reset-names = "phy", "ctrl";
|
|
#phy-cells = <0>;
|
|
};
|