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a3c477b33d
Dot clock routing is setup through different registers depending on the DU generation. The code has been designed for Gen2 and hasn't been updated since. This works thanks to good reset default value, but isn't very safe. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
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drm | ||
host1x | ||
ipu-v3 | ||
vga | ||
Makefile |