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ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
124 lines
2.4 KiB
ArmAsm
124 lines
2.4 KiB
ArmAsm
/*
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* linux/arch/arm/lib/io-readsb.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.Linsb_align: rsb ip, ip, #4
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cmp ip, r2
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movgt ip, r2
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cmp ip, #2
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ldrb r3, [r0]
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strb r3, [r1], #1
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ldrgeb r3, [r0]
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strgeb r3, [r1], #1
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ldrgtb r3, [r0]
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strgtb r3, [r1], #1
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subs r2, r2, ip
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bne .Linsb_aligned
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ENTRY(__raw_readsb)
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teq r2, #0 @ do we have to check for the zero len?
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reteq lr
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ands ip, r1, #3
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bne .Linsb_align
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.Linsb_aligned: stmfd sp!, {r4 - r6, lr}
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subs r2, r2, #16
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bmi .Linsb_no_16
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.Linsb_16_lp: ldrb r3, [r0]
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ldrb r4, [r0]
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ldrb r5, [r0]
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mov r3, r3, put_byte_0
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ldrb r6, [r0]
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orr r3, r3, r4, put_byte_1
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ldrb r4, [r0]
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orr r3, r3, r5, put_byte_2
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ldrb r5, [r0]
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orr r3, r3, r6, put_byte_3
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ldrb r6, [r0]
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mov r4, r4, put_byte_0
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ldrb ip, [r0]
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orr r4, r4, r5, put_byte_1
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ldrb r5, [r0]
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orr r4, r4, r6, put_byte_2
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ldrb r6, [r0]
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orr r4, r4, ip, put_byte_3
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ldrb ip, [r0]
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mov r5, r5, put_byte_0
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ldrb lr, [r0]
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orr r5, r5, r6, put_byte_1
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ldrb r6, [r0]
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orr r5, r5, ip, put_byte_2
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ldrb ip, [r0]
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orr r5, r5, lr, put_byte_3
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ldrb lr, [r0]
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mov r6, r6, put_byte_0
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orr r6, r6, ip, put_byte_1
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ldrb ip, [r0]
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orr r6, r6, lr, put_byte_2
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orr r6, r6, ip, put_byte_3
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stmia r1!, {r3 - r6}
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subs r2, r2, #16
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bpl .Linsb_16_lp
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tst r2, #15
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ldmeqfd sp!, {r4 - r6, pc}
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.Linsb_no_16: tst r2, #8
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beq .Linsb_no_8
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ldrb r3, [r0]
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ldrb r4, [r0]
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ldrb r5, [r0]
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mov r3, r3, put_byte_0
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ldrb r6, [r0]
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orr r3, r3, r4, put_byte_1
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ldrb r4, [r0]
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orr r3, r3, r5, put_byte_2
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ldrb r5, [r0]
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orr r3, r3, r6, put_byte_3
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ldrb r6, [r0]
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mov r4, r4, put_byte_0
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ldrb ip, [r0]
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orr r4, r4, r5, put_byte_1
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orr r4, r4, r6, put_byte_2
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orr r4, r4, ip, put_byte_3
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stmia r1!, {r3, r4}
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.Linsb_no_8: tst r2, #4
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beq .Linsb_no_4
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ldrb r3, [r0]
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ldrb r4, [r0]
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ldrb r5, [r0]
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ldrb r6, [r0]
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mov r3, r3, put_byte_0
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orr r3, r3, r4, put_byte_1
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orr r3, r3, r5, put_byte_2
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orr r3, r3, r6, put_byte_3
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str r3, [r1], #4
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.Linsb_no_4: ands r2, r2, #3
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ldmeqfd sp!, {r4 - r6, pc}
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cmp r2, #2
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ldrb r3, [r0]
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strb r3, [r1], #1
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ldrgeb r3, [r0]
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strgeb r3, [r1], #1
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ldrgtb r3, [r0]
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strgtb r3, [r1]
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ldmfd sp!, {r4 - r6, pc}
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ENDPROC(__raw_readsb)
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