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b8aa16541d
1. Removed driver specific extra params like download_region, address & region_count. The required information is passed as part of flash API. 2. IOSM Devlink documentation updated to reflect the same. Signed-off-by: M Chetan Kumar <m.chetan.kumar@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
595 lines
16 KiB
C
595 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020-2021 Intel Corporation.
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*/
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#include "iosm_ipc_coredump.h"
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#include "iosm_ipc_devlink.h"
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#include "iosm_ipc_flash.h"
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/* This function will pack the data to be sent to the modem using the
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* payload, payload length and pack id
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*/
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static int ipc_flash_proc_format_ebl_pack(struct iosm_flash_data *flash_req,
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u32 pack_length, u16 pack_id,
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u8 *payload, u32 payload_length)
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{
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u16 checksum = pack_id;
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u32 i;
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if (payload_length + IOSM_EBL_HEAD_SIZE > pack_length)
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return -EINVAL;
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flash_req->pack_id = cpu_to_le16(pack_id);
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flash_req->msg_length = cpu_to_le32(payload_length);
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checksum += (payload_length >> IOSM_EBL_PAYL_SHIFT) +
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(payload_length & IOSM_EBL_CKSM);
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for (i = 0; i < payload_length; i++)
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checksum += payload[i];
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flash_req->checksum = cpu_to_le16(checksum);
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return 0;
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}
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/* validate the response received from modem and
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* check the type of errors received
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*/
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static int ipc_flash_proc_check_ebl_rsp(void *hdr_rsp, void *payload_rsp)
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{
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struct iosm_ebl_error *err_info = payload_rsp;
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u16 *rsp_code = hdr_rsp;
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u32 i;
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if (*rsp_code == IOSM_EBL_RSP_BUFF) {
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for (i = 0; i < IOSM_MAX_ERRORS; i++) {
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if (!err_info->error[i].error_code) {
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pr_err("EBL: error_class = %d, error_code = %d",
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err_info->error[i].error_class,
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err_info->error[i].error_code);
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}
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}
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return -EINVAL;
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}
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return 0;
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}
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/* Send data to the modem */
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static int ipc_flash_send_data(struct iosm_devlink *ipc_devlink, u32 size,
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u16 pack_id, u8 *payload, u32 payload_length)
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{
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struct iosm_flash_data flash_req;
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int ret;
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ret = ipc_flash_proc_format_ebl_pack(&flash_req, size,
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pack_id, payload, payload_length);
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if (ret) {
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dev_err(ipc_devlink->dev, "EBL2 pack failed for pack_id:%d",
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pack_id);
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goto ipc_free_payload;
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}
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ret = ipc_imem_sys_devlink_write(ipc_devlink, (u8 *)&flash_req,
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IOSM_EBL_HEAD_SIZE);
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if (ret) {
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dev_err(ipc_devlink->dev, "EBL Header write failed for Id:%x",
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pack_id);
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goto ipc_free_payload;
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}
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ret = ipc_imem_sys_devlink_write(ipc_devlink, payload, payload_length);
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if (ret) {
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dev_err(ipc_devlink->dev, "EBL Payload write failed for Id:%x",
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pack_id);
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}
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ipc_free_payload:
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return ret;
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}
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/**
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* ipc_flash_link_establish - Flash link establishment
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* @ipc_imem: Pointer to struct iosm_imem
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*
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* Returns: 0 on success and failure value on error
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*/
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int ipc_flash_link_establish(struct iosm_imem *ipc_imem)
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{
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u8 ler_data[IOSM_LER_RSP_SIZE];
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u32 bytes_read;
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/* Allocate channel for flashing/cd collection */
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ipc_imem->ipc_devlink->devlink_sio.channel =
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ipc_imem_sys_devlink_open(ipc_imem);
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if (!ipc_imem->ipc_devlink->devlink_sio.channel)
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goto chl_open_fail;
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if (ipc_imem_sys_devlink_read(ipc_imem->ipc_devlink, ler_data,
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IOSM_LER_RSP_SIZE, &bytes_read))
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goto devlink_read_fail;
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if (bytes_read != IOSM_LER_RSP_SIZE)
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goto devlink_read_fail;
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return 0;
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devlink_read_fail:
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ipc_imem_sys_devlink_close(ipc_imem->ipc_devlink);
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chl_open_fail:
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return -EIO;
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}
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/* Receive data from the modem */
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static int ipc_flash_receive_data(struct iosm_devlink *ipc_devlink, u32 size,
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u8 *mdm_rsp)
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{
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u8 mdm_rsp_hdr[IOSM_EBL_HEAD_SIZE];
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u32 bytes_read;
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int ret;
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ret = ipc_imem_sys_devlink_read(ipc_devlink, mdm_rsp_hdr,
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IOSM_EBL_HEAD_SIZE, &bytes_read);
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if (ret) {
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dev_err(ipc_devlink->dev, "EBL rsp to read %d bytes failed",
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IOSM_EBL_HEAD_SIZE);
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goto ipc_flash_recv_err;
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}
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if (bytes_read != IOSM_EBL_HEAD_SIZE) {
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ret = -EINVAL;
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goto ipc_flash_recv_err;
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}
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ret = ipc_imem_sys_devlink_read(ipc_devlink, mdm_rsp, size,
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&bytes_read);
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if (ret) {
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dev_err(ipc_devlink->dev, "EBL rsp to read %d bytes failed",
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size);
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goto ipc_flash_recv_err;
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}
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if (bytes_read != size) {
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ret = -EINVAL;
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goto ipc_flash_recv_err;
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}
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ret = ipc_flash_proc_check_ebl_rsp(mdm_rsp_hdr + 2, mdm_rsp);
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ipc_flash_recv_err:
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return ret;
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}
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/* Function to send command to modem and receive response */
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static int ipc_flash_send_receive(struct iosm_devlink *ipc_devlink, u16 pack_id,
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u8 *payload, u32 payload_length, u8 *mdm_rsp)
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{
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size_t frame_len = IOSM_EBL_DW_PACK_SIZE;
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int ret;
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if (pack_id == FLASH_SET_PROT_CONF)
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frame_len = IOSM_EBL_W_PACK_SIZE;
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ret = ipc_flash_send_data(ipc_devlink, frame_len, pack_id, payload,
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payload_length);
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if (ret)
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goto ipc_flash_send_rcv;
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ret = ipc_flash_receive_data(ipc_devlink,
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frame_len - IOSM_EBL_HEAD_SIZE, mdm_rsp);
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ipc_flash_send_rcv:
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return ret;
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}
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/**
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* ipc_flash_boot_set_capabilities - Set modem boot capabilities in flash
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* @ipc_devlink: Pointer to devlink structure
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* @mdm_rsp: Pointer to modem response buffer
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*
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* Returns: 0 on success and failure value on error
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*/
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int ipc_flash_boot_set_capabilities(struct iosm_devlink *ipc_devlink,
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u8 *mdm_rsp)
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{
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ipc_devlink->ebl_ctx.ebl_sw_info_version =
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_RSP_SW_INFO_VER];
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_SKIP_ERASE] = IOSM_CAP_NOT_ENHANCED;
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_SKIP_CRC] = IOSM_CAP_NOT_ENHANCED;
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if (ipc_devlink->ebl_ctx.m_ebl_resp[EBL_CAPS_FLAG] &
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IOSM_CAP_USE_EXT_CAP) {
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if (ipc_devlink->param.erase_full_flash)
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_OOS_CONFIG] &=
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~((u8)IOSM_EXT_CAP_ERASE_ALL);
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else
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_OOS_CONFIG] &=
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~((u8)IOSM_EXT_CAP_COMMIT_ALL);
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ipc_devlink->ebl_ctx.m_ebl_resp[EBL_EXT_CAPS_HANDLED] =
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IOSM_CAP_USE_EXT_CAP;
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}
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/* Write back the EBL capability to modem
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* Request Set Protcnf command
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*/
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return ipc_flash_send_receive(ipc_devlink, FLASH_SET_PROT_CONF,
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ipc_devlink->ebl_ctx.m_ebl_resp,
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IOSM_EBL_RSP_SIZE, mdm_rsp);
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}
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/* Read the SWID type and SWID value from the EBL */
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int ipc_flash_read_swid(struct iosm_devlink *ipc_devlink, u8 *mdm_rsp)
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{
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struct iosm_flash_msg_control cmd_msg;
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struct iosm_swid_table *swid;
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char ebl_swid[IOSM_SWID_STR];
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int ret;
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if (ipc_devlink->ebl_ctx.ebl_sw_info_version !=
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IOSM_EXT_CAP_SWID_OOS_PACK)
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return -EINVAL;
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cmd_msg.action = cpu_to_le32(FLASH_OOSC_ACTION_READ);
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cmd_msg.type = cpu_to_le32(FLASH_OOSC_TYPE_SWID_TABLE);
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cmd_msg.length = cpu_to_le32(IOSM_MSG_LEN_ARG);
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cmd_msg.arguments = cpu_to_le32(IOSM_MSG_LEN_ARG);
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_OOS_CONTROL,
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(u8 *)&cmd_msg, IOSM_MDM_SEND_16, mdm_rsp);
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if (ret)
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goto ipc_swid_err;
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cmd_msg.action = cpu_to_le32(*((u32 *)mdm_rsp));
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_OOS_DATA_READ,
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(u8 *)&cmd_msg, IOSM_MDM_SEND_4, mdm_rsp);
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if (ret)
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goto ipc_swid_err;
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swid = (struct iosm_swid_table *)mdm_rsp;
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dev_dbg(ipc_devlink->dev, "SWID %x RF_ENGINE_ID %x", swid->sw_id_val,
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swid->rf_engine_id_val);
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snprintf(ebl_swid, sizeof(ebl_swid), "SWID: %x, RF_ENGINE_ID: %x",
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swid->sw_id_val, swid->rf_engine_id_val);
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devlink_flash_update_status_notify(ipc_devlink->devlink_ctx, ebl_swid,
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NULL, 0, 0);
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ipc_swid_err:
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return ret;
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}
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/* Function to check if full erase or conditional erase was successful */
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static int ipc_flash_erase_check(struct iosm_devlink *ipc_devlink, u8 *mdm_rsp)
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{
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int ret, count = 0;
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u16 mdm_rsp_data;
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/* Request Flash Erase Check */
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do {
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mdm_rsp_data = IOSM_MDM_SEND_DATA;
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_ERASE_CHECK,
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(u8 *)&mdm_rsp_data,
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IOSM_MDM_SEND_2, mdm_rsp);
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if (ret)
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goto ipc_erase_chk_err;
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mdm_rsp_data = *((u16 *)mdm_rsp);
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if (mdm_rsp_data > IOSM_MDM_ERASE_RSP) {
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dev_err(ipc_devlink->dev,
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"Flash Erase Check resp wrong 0x%04X",
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mdm_rsp_data);
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ret = -EINVAL;
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goto ipc_erase_chk_err;
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}
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count++;
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msleep(IOSM_FLASH_ERASE_CHECK_INTERVAL);
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} while ((mdm_rsp_data != IOSM_MDM_ERASE_RSP) &&
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(count < (IOSM_FLASH_ERASE_CHECK_TIMEOUT /
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IOSM_FLASH_ERASE_CHECK_INTERVAL)));
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if (mdm_rsp_data != IOSM_MDM_ERASE_RSP) {
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dev_err(ipc_devlink->dev, "Modem erase check timeout failure!");
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ret = -ETIMEDOUT;
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}
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ipc_erase_chk_err:
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return ret;
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}
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/* Full erase function which will erase the nand flash through EBL command */
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static int ipc_flash_full_erase(struct iosm_devlink *ipc_devlink, u8 *mdm_rsp)
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{
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u32 erase_address = IOSM_ERASE_START_ADDR;
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struct iosm_flash_msg_control cmd_msg;
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u32 erase_length = IOSM_ERASE_LEN;
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int ret;
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dev_dbg(ipc_devlink->dev, "Erase full nand flash");
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cmd_msg.action = cpu_to_le32(FLASH_OOSC_ACTION_ERASE);
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cmd_msg.type = cpu_to_le32(FLASH_OOSC_TYPE_ALL_FLASH);
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cmd_msg.length = cpu_to_le32(erase_length);
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cmd_msg.arguments = cpu_to_le32(erase_address);
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_OOS_CONTROL,
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(unsigned char *)&cmd_msg,
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IOSM_MDM_SEND_16, mdm_rsp);
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if (ret)
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goto ipc_flash_erase_err;
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ipc_devlink->param.erase_full_flash_done = IOSM_SET_FLAG;
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ret = ipc_flash_erase_check(ipc_devlink, mdm_rsp);
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ipc_flash_erase_err:
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return ret;
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}
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/* Logic for flashing all the Loadmaps available for individual fls file */
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static int ipc_flash_download_region(struct iosm_devlink *ipc_devlink,
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const struct firmware *fw, u8 *mdm_rsp)
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{
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u32 raw_len, rest_len = fw->size - IOSM_DEVLINK_HDR_SIZE;
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struct iosm_devlink_image *fls_data;
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__le32 reg_info[2]; /* 0th position region address, 1st position size */
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u32 nand_address;
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char *file_ptr;
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int ret;
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fls_data = (struct iosm_devlink_image *)fw->data;
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file_ptr = (void *)(fls_data + 1);
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nand_address = le32_to_cpu(fls_data->region_address);
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reg_info[0] = cpu_to_le32(nand_address);
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if (!ipc_devlink->param.erase_full_flash_done) {
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reg_info[1] = cpu_to_le32(nand_address + rest_len - 2);
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_ERASE_START,
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(u8 *)reg_info, IOSM_MDM_SEND_8,
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mdm_rsp);
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if (ret)
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goto dl_region_fail;
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ret = ipc_flash_erase_check(ipc_devlink, mdm_rsp);
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if (ret)
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goto dl_region_fail;
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}
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/* Request Flash Set Address */
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_SET_ADDRESS,
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(u8 *)reg_info, IOSM_MDM_SEND_4, mdm_rsp);
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if (ret)
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goto dl_region_fail;
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/* Request Flash Write Raw Image */
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ret = ipc_flash_send_data(ipc_devlink, IOSM_EBL_DW_PACK_SIZE,
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FLASH_WRITE_IMAGE_RAW, (u8 *)&rest_len,
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IOSM_MDM_SEND_4);
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if (ret)
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goto dl_region_fail;
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do {
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raw_len = (rest_len > IOSM_FLS_BUF_SIZE) ? IOSM_FLS_BUF_SIZE :
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rest_len;
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ret = ipc_imem_sys_devlink_write(ipc_devlink, file_ptr,
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raw_len);
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if (ret) {
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dev_err(ipc_devlink->dev, "Image write failed");
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goto dl_region_fail;
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}
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file_ptr += raw_len;
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rest_len -= raw_len;
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} while (rest_len);
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ret = ipc_flash_receive_data(ipc_devlink, IOSM_EBL_DW_PAYL_SIZE,
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mdm_rsp);
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dl_region_fail:
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return ret;
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}
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/**
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* ipc_flash_send_fls - Inject Modem subsystem fls file to device
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* @ipc_devlink: Pointer to devlink structure
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* @fw: FW image
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* @mdm_rsp: Pointer to modem response buffer
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*
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* Returns: 0 on success and failure value on error
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*/
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int ipc_flash_send_fls(struct iosm_devlink *ipc_devlink,
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const struct firmware *fw, u8 *mdm_rsp)
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{
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u32 fw_size = fw->size - IOSM_DEVLINK_HDR_SIZE;
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struct iosm_devlink_image *fls_data;
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u16 flash_cmd;
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int ret;
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fls_data = (struct iosm_devlink_image *)fw->data;
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if (ipc_devlink->param.erase_full_flash) {
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ipc_devlink->param.erase_full_flash = false;
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ret = ipc_flash_full_erase(ipc_devlink, mdm_rsp);
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if (ret)
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goto ipc_flash_err;
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}
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/* Request Sec Start */
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if (!fls_data->download_region) {
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_SEC_START,
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(u8 *)fw->data +
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IOSM_DEVLINK_HDR_SIZE, fw_size,
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mdm_rsp);
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if (ret)
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goto ipc_flash_err;
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} else {
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/* Download regions */
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ret = ipc_flash_download_region(ipc_devlink, fw, mdm_rsp);
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if (ret)
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goto ipc_flash_err;
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if (fls_data->last_region) {
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/* Request Sec End */
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flash_cmd = IOSM_MDM_SEND_DATA;
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ret = ipc_flash_send_receive(ipc_devlink, FLASH_SEC_END,
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(u8 *)&flash_cmd,
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IOSM_MDM_SEND_2, mdm_rsp);
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}
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}
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ipc_flash_err:
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return ret;
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}
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/**
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* ipc_flash_boot_psi - Inject PSI image
|
|
* @ipc_devlink: Pointer to devlink structure
|
|
* @fw: FW image
|
|
*
|
|
* Returns: 0 on success and failure value on error
|
|
*/
|
|
int ipc_flash_boot_psi(struct iosm_devlink *ipc_devlink,
|
|
const struct firmware *fw)
|
|
{
|
|
u32 bytes_read, psi_size = fw->size - IOSM_DEVLINK_HDR_SIZE;
|
|
u8 psi_ack_byte[IOSM_PSI_ACK], read_data[2];
|
|
u8 *psi_code;
|
|
int ret;
|
|
|
|
dev_dbg(ipc_devlink->dev, "Boot transfer PSI");
|
|
psi_code = kmemdup(fw->data + IOSM_DEVLINK_HDR_SIZE, psi_size,
|
|
GFP_KERNEL);
|
|
if (!psi_code)
|
|
return -ENOMEM;
|
|
|
|
ret = ipc_imem_sys_devlink_write(ipc_devlink, psi_code, psi_size);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "RPSI Image write failed");
|
|
goto ipc_flash_psi_free;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_read(ipc_devlink, read_data,
|
|
IOSM_LER_ACK_SIZE, &bytes_read);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "ipc_devlink_sio_read ACK failed");
|
|
goto ipc_flash_psi_free;
|
|
}
|
|
|
|
if (bytes_read != IOSM_LER_ACK_SIZE) {
|
|
ret = -EINVAL;
|
|
goto ipc_flash_psi_free;
|
|
}
|
|
|
|
snprintf(psi_ack_byte, sizeof(psi_ack_byte), "%x%x", read_data[0],
|
|
read_data[1]);
|
|
devlink_flash_update_status_notify(ipc_devlink->devlink_ctx,
|
|
psi_ack_byte, "PSI ACK", 0, 0);
|
|
|
|
if (read_data[0] == 0x00 && read_data[1] == 0xCD) {
|
|
dev_dbg(ipc_devlink->dev, "Coredump detected");
|
|
ret = ipc_coredump_get_list(ipc_devlink,
|
|
rpsi_cmd_coredump_start);
|
|
if (ret)
|
|
dev_err(ipc_devlink->dev, "Failed to get cd list");
|
|
}
|
|
|
|
ipc_flash_psi_free:
|
|
kfree(psi_code);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* ipc_flash_boot_ebl - Inject EBL image
|
|
* @ipc_devlink: Pointer to devlink structure
|
|
* @fw: FW image
|
|
*
|
|
* Returns: 0 on success and failure value on error
|
|
*/
|
|
int ipc_flash_boot_ebl(struct iosm_devlink *ipc_devlink,
|
|
const struct firmware *fw)
|
|
{
|
|
u32 ebl_size = fw->size - IOSM_DEVLINK_HDR_SIZE;
|
|
u8 read_data[2];
|
|
u32 bytes_read;
|
|
int ret;
|
|
|
|
if (ipc_mmio_get_exec_stage(ipc_devlink->pcie->imem->mmio) !=
|
|
IPC_MEM_EXEC_STAGE_PSI) {
|
|
devlink_flash_update_status_notify(ipc_devlink->devlink_ctx,
|
|
"Invalid execution stage",
|
|
NULL, 0, 0);
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_dbg(ipc_devlink->dev, "Boot transfer EBL");
|
|
ret = ipc_devlink_send_cmd(ipc_devlink, rpsi_cmd_code_ebl,
|
|
IOSM_RPSI_LOAD_SIZE);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "Sending rpsi_cmd_code_ebl failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_read(ipc_devlink, read_data, IOSM_READ_SIZE,
|
|
&bytes_read);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "rpsi_cmd_code_ebl read failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
if (bytes_read != IOSM_READ_SIZE) {
|
|
ret = -EINVAL;
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_write(ipc_devlink, (u8 *)&ebl_size,
|
|
sizeof(ebl_size));
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "EBL length write failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_read(ipc_devlink, read_data, IOSM_READ_SIZE,
|
|
&bytes_read);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "EBL read failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
if (bytes_read != IOSM_READ_SIZE) {
|
|
ret = -EINVAL;
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_write(ipc_devlink,
|
|
(u8 *)fw->data + IOSM_DEVLINK_HDR_SIZE,
|
|
ebl_size);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "EBL data transfer failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_read(ipc_devlink, read_data, IOSM_READ_SIZE,
|
|
&bytes_read);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "EBL read failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
if (bytes_read != IOSM_READ_SIZE) {
|
|
ret = -EINVAL;
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
ret = ipc_imem_sys_devlink_read(ipc_devlink,
|
|
ipc_devlink->ebl_ctx.m_ebl_resp,
|
|
IOSM_EBL_RSP_SIZE, &bytes_read);
|
|
if (ret) {
|
|
dev_err(ipc_devlink->dev, "EBL response read failed");
|
|
goto ipc_flash_ebl_err;
|
|
}
|
|
|
|
if (bytes_read != IOSM_EBL_RSP_SIZE)
|
|
ret = -EINVAL;
|
|
|
|
ipc_flash_ebl_err:
|
|
return ret;
|
|
}
|