Icenowy Zheng a0b1910e85 dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 ... Allwinner H3/V3s/A64 SoCs have a special USB PHY0 that can route to two controllers: one is MUSB and the other is a EHCI/OHCI pair. When it's routed to EHCI/OHCI pair, it will needs a "pmu0" regs to tweak, like other EHCI/OHCI pairs in Allwinner SoCs. Add this to the binding of USB PHYs on Allwinner H3/V3s/A64. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2017-04-10 16:42:57 +05:30
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bindings	dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64	2017-04-10 16:42:57 +05:30
00-INDEX
booting-without-of.txt	dt: add documentation of "hotpluggable" memory property	2016-12-12 18:55:07 -08:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt