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b1064037e8
The Ethernet PHY on the Cubieboard 4 and A80 Optimus have the RX and TX delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins. Fix the phy-mode description to correct reflect this so that the implementation doesn't reconfigure the delays incorrectly. This happened with commitbbc4d71d63("net: phy: realtek: fix rtl8211e rx/tx delay config"). Fixes:98048143b7("ARM: dts: sun9i: cubieboard4: Enable GMAC") Fixes:bc9bd03a44("ARM: dts: sun9i: a80-optimus: Enable GMAC") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Jernej Skrabec <jernej.skrabec@siol.net> Link: https://lore.kernel.org/r/20201024162515.30032-7-wens@kernel.org
509 lines
11 KiB
Plaintext
509 lines
11 KiB
Plaintext
/*
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* Copyright 2015 Tyler Baker
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*
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* Tyler Baker <tyler.baker@linaro.org>
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* Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun9i-a80.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Cubietech Cubieboard4";
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compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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green {
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label = "cubieboard4:green:usr";
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gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
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};
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red {
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label = "cubieboard4:red:usr";
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gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
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};
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};
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vga-connector {
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compatible = "vga-connector";
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label = "vga";
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ddc-i2c-bus = <&i2c3>;
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port {
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vga_con_in: endpoint {
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remote-endpoint = <&vga_dac_out>;
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};
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};
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};
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vga-dac {
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compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
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vdd-supply = <®_dcdc1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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vga_dac_in: endpoint {
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remote-endpoint = <&tcon0_out_vga>;
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};
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};
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port@1 {
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reg = <1>;
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vga_dac_out: endpoint {
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remote-endpoint = <&vga_con_in>;
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};
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};
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};
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};
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wifi_pwrseq: wifi-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&ac100_rtc 1>;
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clock-names = "ext_clock";
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/* enables internal regulator and de-asserts reset */
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reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
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};
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};
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&de {
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status = "okay";
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};
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&gmac {
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy-handle = <&phy1>;
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phy-mode = "rgmii-id";
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phy-supply = <®_cldo1>;
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status = "okay";
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins>;
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status = "okay";
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};
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&mdio {
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <4>;
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cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <®_dldo1>;
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vqmmc-supply = <®_cldo3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&mmc1_pins {
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bias-pull-up;
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&mmc2_8bit_pins {
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/* Increase drive strength for DDR modes */
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drive-strength = <40>;
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};
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&osc32k {
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/* osc32k input is from AC100 */
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clocks = <&ac100_rtc 0>;
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};
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&pio {
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vcc-pa-supply = <®_ldo_io1>;
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vcc-pb-supply = <®_aldo2>;
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vcc-pc-supply = <®_dcdc1>;
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vcc-pd-supply = <®_dc1sw>;
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vcc-pe-supply = <®_eldo2>;
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vcc-pf-supply = <®_dcdc1>;
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vcc-pg-supply = <®_ldo_io0>;
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vcc-ph-supply = <®_dcdc1>;
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};
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&r_ir {
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status = "okay";
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};
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&r_pio {
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vcc-pl-supply = <®_dldo2>;
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vcc-pm-supply = <®_eldo3>;
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};
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&r_rsb {
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status = "okay";
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axp809: pmic@3a3 {
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reg = <0x3a3>;
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interrupt-parent = <&nmi_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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reg_aldo1: aldo1 {
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/*
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* TODO: This should be handled by the
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* USB PHY driver.
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*/
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc33-usbh";
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};
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reg_aldo2: aldo2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-pb-io-cam";
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};
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aldo3 {
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/* unused */
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};
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reg_dc1sw: dc1sw {
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regulator-name = "vcc-pd";
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};
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reg_dc5ldo: dc5ldo {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpus-09-usbh";
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};
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reg_dcdc1: dcdc1 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-3v";
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};
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reg_dcdc2: dcdc2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-gpu";
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};
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reg_dcdc3: dcdc3 {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpua";
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};
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reg_dcdc4: dcdc4 {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-sys-usb0-hdmi";
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};
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reg_dcdc5: dcdc5 {
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regulator-always-on;
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regulator-min-microvolt = <1425000>;
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regulator-max-microvolt = <1575000>;
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regulator-name = "vcc-dram";
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};
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reg_dldo1: dldo1 {
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/*
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* The WiFi chip supports a wide range
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* (3.0 ~ 4.8V) of voltages, and so does
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* this regulator (3.0 ~ 4.2V), but
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* Allwinner SDK always sets it to 3.3V.
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*/
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi";
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};
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reg_dldo2: dldo2 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-pl";
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};
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reg_eldo1: eldo1 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vcc-dvdd-cam";
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};
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reg_eldo2: eldo2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-pe";
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};
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reg_eldo3: eldo3 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-pm-codec-io1";
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};
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reg_ldo_io0: ldo_io0 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-pg";
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};
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reg_ldo_io1: ldo_io1 {
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-name = "vcc-pa-gmac-2v5";
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};
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reg_rtc_ldo: rtc_ldo {
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regulator-name = "vcc-rtc-vdd1v8-io";
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};
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sw {
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/* unused */
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};
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};
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};
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axp806: pmic@745 {
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compatible = "x-powers,axp806";
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reg = <0x745>;
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interrupt-parent = <&nmi_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <1>;
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bldoin-supply = <®_dcdce>;
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regulators {
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reg_s_aldo1: aldo1 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "avcc";
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};
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aldo2 {
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/*
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* unused, but use a different name to
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* avoid name clash with axp809's aldo's
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*/
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regulator-name = "s_aldo2";
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};
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aldo3 {
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/*
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* unused, but use a different name to
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* avoid name clash with axp809's aldo's
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*/
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regulator-name = "s_aldo3";
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};
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reg_bldo1: bldo1 {
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regulator-always-on;
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regulator-min-microvolt = <1700000>;
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regulator-max-microvolt = <1900000>;
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regulator-name = "vcc18-efuse-adc-display-csi";
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};
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reg_bldo2: bldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1700000>;
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regulator-max-microvolt = <1900000>;
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regulator-name =
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"vdd18-drampll-vcc18-pll-cpvdd";
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};
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bldo3 {
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/* unused */
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};
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reg_bldo4: bldo4 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1300000>;
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regulator-name = "vcc12-hsic";
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};
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reg_cldo1: cldo1 {
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/*
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* This was 3V in the original design, but
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* 3.3V is the recommended supply voltage
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* for the Ethernet PHY.
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*/
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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/*
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* The PHY requires 20ms after all voltages
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* are applied until core logic is ready and
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* 30ms after the reset pin is de-asserted.
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* Set a 100ms delay to account for PMIC
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* ramp time and board traces.
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*/
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regulator-enable-ramp-delay = <100000>;
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regulator-name = "vcc-gmac-phy";
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};
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reg_cldo2: cldo2 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-name = "afvcc-cam";
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};
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reg_cldo3: cldo3 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-io-wifi-codec-io2";
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};
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reg_dcdca: dcdca {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpub";
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};
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reg_dcdcd: dcdcd {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-vpu";
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};
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reg_dcdce: dcdce {
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regulator-always-on;
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regulator-min-microvolt = <2100000>;
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regulator-max-microvolt = <2100000>;
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regulator-name = "vcc-bldo-codec-ldoin";
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};
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sw {
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/*
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* unused, but use a different name to
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* avoid name clash with axp809's sw
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*/
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regulator-name = "s_sw";
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};
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};
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};
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ac100: codec@e89 {
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compatible = "x-powers,ac100";
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reg = <0xe89>;
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ac100_codec: codec {
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compatible = "x-powers,ac100-codec";
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interrupt-parent = <&r_pio>;
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interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
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#clock-cells = <0>;
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clock-output-names = "4M_adda";
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};
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ac100_rtc: rtc {
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compatible = "x-powers,ac100-rtc";
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interrupt-parent = <&nmi_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&ac100_codec>;
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#clock-cells = <1>;
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clock-output-names = "cko1_rtc",
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"cko2_rtc",
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"cko3_rtc";
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};
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};
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};
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#include "axp809.dtsi"
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&tcon0 {
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_rgb888_pins>;
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};
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&tcon0_out {
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tcon0_out_vga: endpoint {
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remote-endpoint = <&vga_dac_in>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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