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6a9681168b
Boards based on imx51 have duplicate memory nodes: - One coming from the board dts file: memory@ - One coming from the imx51.dtsi file. Fix the duplication by removing the memory node from the dtsi file and by adding 'device_type = "memory";' in the board dts. Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
458 lines
8.8 KiB
Plaintext
458 lines
8.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2018 Zodiac Inflight Innovations
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*/
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/dts-v1/;
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#include "imx51.dtsi"
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/ {
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model = "ZII SCU2 Mezz Board";
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compatible = "zii,imx51-scu2-mezz", "fsl,imx51";
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chosen {
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stdout-path = &uart1;
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};
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/* Will be filled by the bootloader */
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memory@90000000 {
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device_type = "memory";
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reg = <0x90000000 0>;
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};
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aliases {
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mdio-gpio0 = &mdio_gpio;
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_mmc_reset>;
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gpio = <&gpio3 13 GPIO_ACTIVE_LOW>;
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startup-delay-us = <150000>;
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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mdio_gpio: mdio-gpio {
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compatible = "virtual,mdio-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_swmdio>;
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gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>, /* mdc */
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<&gpio2 6 GPIO_ACTIVE_HIGH>; /* mdio */
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "marvell,mv88e6085";
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reg = <0>;
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dsa,member = <0 0>;
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eeprom-length = <512>;
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interrupt-parent = <&gpio1>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "port4";
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};
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port@1 {
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reg = <1>;
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label = "port5";
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};
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port@2 {
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reg = <2>;
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label = "port6";
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};
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port@3 {
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reg = <3>;
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label = "port7";
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};
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port@4 {
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reg = <4>;
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label = "cpu";
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ethernet = <&fec>;
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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port@5 {
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reg = <5>;
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label = "mezz2esb";
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phy-mode = "sgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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};
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&cpu {
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cpu-supply = <&sw1_reg>;
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
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<&gpio4 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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pmic@0 {
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compatible = "fsl,mc13892";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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spi-max-frequency = <6000000>;
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spi-cs-high;
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reg = <0>;
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interrupt-parent = <&gpio1>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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fsl,mc13xxx-uses-adc;
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regulators {
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sw1_reg: sw1 {
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1375000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3_reg: sw3 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vpll_reg: vpll {
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdig_reg: vdig {
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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};
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vsd_reg: vsd {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3150000>;
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regulator-always-on;
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};
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vusb_reg: vusb {
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regulator-always-on;
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};
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vusb2_reg: vusb2 {
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regulator-min-microvolt = <2400000>;
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regulator-max-microvolt = <2775000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vvideo_reg: vvideo {
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regulator-min-microvolt = <2775000>;
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regulator-max-microvolt = <2775000>;
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};
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vaudio_reg: vaudio {
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regulator-min-microvolt = <2300000>;
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regulator-max-microvolt = <3000000>;
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};
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vcam_reg: vcam {
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <3000000>;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3150000>;
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regulator-always-on;
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};
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-always-on;
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};
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};
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led-control = <0x0 0x0 0x3f83f8 0x0>;
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sysled3: led3@3 {
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reg = <3>;
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label = "system:red:power";
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linux,default-trigger = "default-on";
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};
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sysled4: led4@4 {
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reg = <4>;
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label = "system:green:act";
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linux,default-trigger = "heartbeat";
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};
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};
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};
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flash@1 {
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compatible = "atmel,at45", "atmel,dataflash";
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reg = <1>;
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spi-max-frequency = <25000000>;
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};
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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bus-width = <8>;
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non-removable;
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no-1-8-v;
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no-sdio;
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no-sd;
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status = "okay";
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};
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&esdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc4>;
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bus-width = <4>;
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no-1-8-v;
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no-sdio;
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cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "mii";
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status = "okay";
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phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <1>;
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phy-supply = <&vgen3_reg>;
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phy-handle = <ðphy>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy: ethernet-phy@0 {
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reg = <0>;
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max-speed = <100>;
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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eeprom@50 {
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compatible = "atmel,24c04";
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pagesize = <16>;
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reg = <0x50>;
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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rave-sp {
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compatible = "zii,rave-sp-mezz";
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current-speed = <57600>;
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#address-cells = <1>;
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#size-cells = <1>;
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watchdog {
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compatible = "zii,rave-sp-watchdog-legacy";
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};
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eeprom@a4 {
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compatible = "zii,rave-sp-eeprom";
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reg = <0xa4 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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zii,eeprom-name = "main-eeprom";
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};
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};
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};
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&usbotg {
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dr_mode = "host";
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disable-over-current;
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phy_type = "utmi_wide";
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vbus-supply = <&usb_vbus>;
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status = "okay";
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};
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&usbphy0 {
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vcc-supply = <&vusb2_reg>;
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};
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&vpu {
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status = "disabled";
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};
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&wdog1 {
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status = "disabled";
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};
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&iomuxc {
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
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MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
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MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
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MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
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MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
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MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
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MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
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MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
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MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
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MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
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MX51_PAD_SD2_DATA0__SD1_DAT4 0x20d5
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MX51_PAD_SD2_DATA1__SD1_DAT5 0x20d5
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MX51_PAD_SD2_DATA2__SD1_DAT6 0x20d5
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MX51_PAD_SD2_DATA3__SD1_DAT7 0x20d5
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>;
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};
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pinctrl_esdhc4: esdhc4grp {
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fsl,pins = <
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MX51_PAD_NANDF_RB1__SD4_CMD 0x400020d5
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MX51_PAD_NANDF_CS2__SD4_CLK 0x20d5
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MX51_PAD_NANDF_CS3__SD4_DAT0 0x20d5
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MX51_PAD_NANDF_CS4__SD4_DAT1 0x20d5
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MX51_PAD_NANDF_CS5__SD4_DAT2 0x20d5
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MX51_PAD_NANDF_CS6__SD4_DAT3 0x20d5
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MX51_PAD_NANDF_D0__GPIO4_8 0x100
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x2004
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MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x2004
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MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x2004
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MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x2004
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MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
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MX51_PAD_DISP2_DAT10__FEC_COL 0x0180
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MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x0180
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MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x20a4
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MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x20a4
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MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
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MX51_PAD_DI_GP3__FEC_TX_ER 0x2004
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MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x2180
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MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x0085
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MX51_PAD_DI_GP4__FEC_RDATA2 0x0085
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MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x0085
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MX51_PAD_DI2_PIN2__FEC_MDC 0x2004
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MX51_PAD_DI2_PIN3__FEC_MDIO 0x01f5
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MX51_PAD_DI2_PIN4__FEC_CRS 0x0180
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MX51_PAD_EIM_A20__GPIO2_14 0x0085
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MX51_PAD_EIM_A21__GPIO2_15 0x00e5
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
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MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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MX51_PAD_GPIO1_4__GPIO1_4 0x85
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MX51_PAD_GPIO1_8__GPIO1_8 0xe5
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>;
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};
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pinctrl_swmdio: swmdiogrp {
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fsl,pins = <
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MX51_PAD_EIM_D22__GPIO2_6 0x100
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MX51_PAD_EIM_D23__GPIO2_7 0x100
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
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MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
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MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
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>;
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};
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pinctrl_usb_mmc_reset: usbmmcgrp {
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fsl,pins = <
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MX51_PAD_CSI1_D9__GPIO3_13 0x85
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>;
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};
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};
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