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43bf202545
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong. Currently the first field is used to set the page 2, but this is pointless. The usage is not correct, and we are setting the wrong registers. Fix it. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
331 lines
6.1 KiB
Plaintext
331 lines
6.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for D-Link DNS-327L
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*
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* Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
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*/
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/* Remaining unsolved:
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* There's still some unknown device on i2c address 0x13
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-370.dtsi"
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/ {
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model = "D-Link DNS-327L";
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compatible = "dlink,dns327l",
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"marvell,armada370",
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"marvell,armada-370-xp";
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chosen {
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stdout-path = &uart0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MiB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
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internal-regs {
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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usb@50000 {
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status = "okay";
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};
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <
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&backup_button_pin
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&power_button_pin
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&reset_button_pin>;
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pinctrl-names = "default";
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power-button {
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label = "Power Button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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backup-button {
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label = "Backup Button";
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linux,code = <KEY_COPY>;
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gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
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};
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reset-button {
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label = "Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <
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&sata_l_amber_pin
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&sata_r_amber_pin
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&backup_led_pin
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/* Ensure these are managed by hardware */
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&sata_l_white_pin
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&sata_r_white_pin>;
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pinctrl-names = "default";
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sata-r-amber-pin {
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label = "dns327l:amber:sata-r";
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gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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sata-l-amber-pin {
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label = "dns327l:amber:sata-l";
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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backup-led-pin {
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label = "dns327l:white:usb";
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gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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usb_power: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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pinctrl-0 = <&xhci_pwr_pin>;
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pinctrl-names = "default";
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regulator-name = "USB3.0 Port Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-boot-on;
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regulator-always-on;
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gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
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};
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sata_r_power: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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pinctrl-0 = <&sata_r_pwr_pin>;
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pinctrl-names = "default";
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regulator-name = "SATA-R Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <2000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
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};
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sata_l_power: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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pinctrl-0 = <&sata_l_pwr_pin>;
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pinctrl-names = "default";
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regulator-name = "SATA-L Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <4000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&pciec {
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status = "okay";
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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&pinctrl {
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sata_l_white_pin: sata-l-white-pin {
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marvell,pins = "mpp57";
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marvell,function = "sata0";
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};
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sata_r_white_pin: sata-r-white-pin {
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marvell,pins = "mpp55";
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marvell,function = "sata1";
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};
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sata_r_amber_pin: sata-r-amber-pin {
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marvell,pins = "mpp52";
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marvell,function = "gpio";
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};
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sata_l_amber_pin: sata-l-amber-pin {
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marvell,pins = "mpp53";
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marvell,function = "gpio";
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};
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backup_led_pin: backup-led-pin {
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marvell,pins = "mpp61";
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marvell,function = "gpo";
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};
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xhci_pwr_pin: xhci-pwr-pin {
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marvell,pins = "mpp13";
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marvell,function = "gpio";
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};
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sata_r_pwr_pin: sata-r-pwr-pin {
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marvell,pins = "mpp54";
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marvell,function = "gpio";
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};
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sata_l_pwr_pin: sata-l-pwr-pin {
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marvell,pins = "mpp56";
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marvell,function = "gpio";
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};
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uart1_pins: uart1-pins {
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marvell,pins = "mpp60", "mpp61";
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marvell,function = "uart1";
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};
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power_button_pin: power-button-pin {
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marvell,pins = "mpp65";
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marvell,function = "gpio";
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};
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backup_button_pin: backup-button-pin {
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marvell,pins = "mpp63";
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marvell,function = "gpio";
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};
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reset_button_pin: reset-button-pin {
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marvell,pins = "mpp64";
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marvell,function = "gpio";
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};
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};
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/* Serial console */
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&uart0 {
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status = "okay";
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};
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/* Connected to Weltrend MCU */
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&uart1 {
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pinctrl-0 = <&uart1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mdio {
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phy0: ethernet-phy@0 { /* Marvell 88E1318 */
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reg = <0>;
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marvell,reg-init = <0x2 0x19 0x0 0x0077>,
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<0x2 0x18 0x0 0x5747>;
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};
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};
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ð1 {
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&i2c0 {
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compatible = "marvell,mv64xxx-i2c";
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clock-frequency = <100000>;
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status = "okay";
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};
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&nand_controller {
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status = "okay";
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nand@0 {
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reg = <0>;
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label = "pxa3xx_nand-0";
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nand-rb = <0>;
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marvell,nand-keep-config;
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nand-on-flash-bbt;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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/* 1.0 MiB */
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reg = <0x0000000 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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/* 128 KiB */
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reg = <0x100000 0x20000>;
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read-only;
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};
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partition@120000 {
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label = "uImage";
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/* 7 MiB */
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reg = <0x120000 0x700000>;
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};
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partition@820000 {
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label = "ubifs";
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/* ~ 84 MiB */
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reg = <0x820000 0x54e0000>;
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};
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/* Hardcoded into stock bootloader */
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partition@5d00000 {
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label = "failsafe-uImage";
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/* 5 MiB */
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reg = <0x5d00000 0x500000>;
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};
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partition@6200000 {
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label = "failsafe-fs";
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/* 29 MiB */
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reg = <0x6200000 0x1d00000>;
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};
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partition@7f00000 {
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label = "bbt";
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/* 1 MiB for BBT */
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reg = <0x7f00000 0x100000>;
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};
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};
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};
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};
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