Marc Zyngier 9f2efa320d arm64; insn: Add encoder for the EXTR instruction ... Add an encoder for the EXTR instruction, which also implements the ROR variant (where Rn == Rm). Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2018-03-19 13:05:10 +00:00
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asm	arm64; insn: Add encoder for the EXTR instruction	2018-03-19 13:05:10 +00:00
uapi/asm	Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace	2018-01-30 14:18:52 -08:00