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7587b5965f
- Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSWIMoAAoJEBvUPslcq6VzudIQAKVjdFI26yxmI3xpYjNVS2P8 JWaUTTjHAR7Lc0EWwtuGj6CqCtbNXUH1bTnChQrkzhT7fPMGQGFbgErnoaYQdwwJ qI15T7qcwy4q54vzeaOMAUS9UNZzr4lChEvxt9uYNoEhHlu7i6/ntyk5fgRfHMsh yK439VA7W/2rLNinpUmIAghx6+gUuRIBbVtfJ71gg5roXL7fY2hYizEoIkDKqWSD i1F24Xt33LAjNhy3n4/6JxCldee7ib2z0YrOUOrTdXWh/L1G9tDTslkdga6rAA5c A+B4nP7zP7i9c1SlTPbwRyguwjHhfSPuNTRhyhuePbwVk4bscglQZx8A7dH8BwS0 pSCUxCTe2+CPEEzeN/ee9TgXwyX9Ab/r5BM092xFrX2lBbV3KxPl1F7rAxJ4HQTu Bh/M5bnKGupO7H9MOKqmLAf1y3a3JCrXVUuQljDMJnvauB8QFTx0nYQvZ/bQCJLZ /wfADHtooJ/FGHFS7Vb+HSLX7ifF2HyES9FgnQag5H77VfXS+bqI5yHsTcYHTgP1 MlW8mObg0vJ+oUuowhhrk9pzQ1l1VFIaMqOKOouL3X6GHAHFiBSCti1fRiSE7d4U feW7a0NSyIjue+MAwxCjSLXOpHCATgnQ1mp9s8ByD0IF98iPugpnp9d6NGH/wp9A bgK7SGeOWXGoc+kN672c =bqsS -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
278 lines
6.0 KiB
Plaintext
278 lines
6.0 KiB
Plaintext
/*
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* Device Tree Source for the r8a7790 SoC
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/ {
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compatible = "renesas,r8a7790";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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clock-frequency = <1300000000>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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clock-frequency = <1300000000>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <2>;
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clock-frequency = <1300000000>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <3>;
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clock-frequency = <1300000000>;
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};
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cpu4: cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x100>;
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clock-frequency = <780000000>;
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};
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cpu5: cpu@5 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x101>;
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clock-frequency = <780000000>;
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};
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cpu6: cpu@6 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x102>;
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clock-frequency = <780000000>;
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};
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cpu7: cpu@7 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x103>;
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clock-frequency = <780000000>;
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};
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0 0xf1001000 0 0x1000>,
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<0 0xf1002000 0 0x1000>,
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<0 0xf1004000 0 0x2000>,
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<0 0xf1006000 0 0x2000>;
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interrupts = <1 9 0xf04>;
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};
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gpio0: gpio@ffc40000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc40000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 4 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 0 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio1: gpio@ffc41000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc41000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 5 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@ffc42000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc42000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 6 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@ffc43000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc43000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 7 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 96 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@ffc44000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc44000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 8 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 128 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio5: gpio@ffc45000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc45000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 0x4>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 160 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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};
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irqc0: interrupt-controller@e61c0000 {
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compatible = "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0000 0 0x200>;
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interrupt-parent = <&gic>;
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interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
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};
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6508000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 287 0x4>;
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status = "disabled";
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};
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i2c1: i2c@e6518000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6518000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 288 0x4>;
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status = "disabled";
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};
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i2c2: i2c@e6530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6530000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 286 0x4>;
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status = "disabled";
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};
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i2c3: i2c@e6540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6540000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 290 0x4>;
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status = "disabled";
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};
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mmcif0: mmcif@ee200000 {
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compatible = "renesas,sh-mmcif";
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reg = <0 0xee200000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 169 0x4>;
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reg-io-width = <4>;
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status = "disabled";
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};
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mmcif1: mmcif@ee220000 {
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compatible = "renesas,sh-mmcif";
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reg = <0 0xee220000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 170 0x4>;
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reg-io-width = <4>;
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status = "disabled";
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};
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pfc: pfc@e6060000 {
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compatible = "renesas,pfc-r8a7790";
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reg = <0 0xe6060000 0 0x250>;
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};
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sdhi0: sdhi@ee100000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee100000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 165 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi1: sdhi@ee120000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee120000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 166 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi2: sdhi@ee140000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee140000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi3: sdhi@ee160000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee160000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 168 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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};
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