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Brahma-B53 and Cortex-A72 CPUs integrated on Broadcom STB SoCs feature a read-ahead cache that performs cache line size adaptation between the bus interface unit and the memory controller. On 32-bit ARM kernels we have to resort to a full featured read-ahead cache driver under arch/arm/mm/cache-b15-rac.c (CONFIG_CACHE_B15_RAC) because there are still cache maintenance operations by set/ways/index that cannot be transparently handled by the ARM Coherency Extension that the read-ahead cache interfaces to. The 64-bit ARM kernel however has long deprecated all of those, so this is simply a one time configuration. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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| brcmstb | ||
| bcm2835-power.c | ||
| Kconfig | ||
| Makefile | ||
| raspberrypi-power.c | ||