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9e8a93ac27
The LRCK period field in the FMT0 register holds the number of LRCK period
for one channel in I2S mode.
This has been hardcoded to 32, while it really should be the physical width
of the format, which creates an improper clock when using a 16bit format,
with the i2s controller as LRCK master.
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
sun4i-codec.c | ||
sun4i-i2s.c | ||
sun4i-spdif.c | ||
sun8i-adda-pr-regmap.c | ||
sun8i-adda-pr-regmap.h | ||
sun8i-codec-analog.c | ||
sun8i-codec.c | ||
sun50i-codec-analog.c |