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9e02977bfa
When we looked into FIO performance with swiotlb enabled in VM, we found
swiotlb_bounce() is always called one more time than expected for each DMA
read request.
It turns out that the bounce buffer is copied to original DMA buffer twice
after the completion of a DMA request (one is done by in
dma_direct_sync_single_for_cpu(), the other by swiotlb_tbl_unmap_single()).
But the content in bounce buffer actually doesn't change between the two
rounds of copy. So, one round of copy is redundant.
Pass DMA_ATTR_SKIP_CPU_SYNC flag to swiotlb_tbl_unmap_single() to
skip the memory copy in it.
This fix increases FIO 64KB sequential read throughput in a guest with
swiotlb=force by 5.6%.
Fixes: 55897af630 ("dma-direct: merge swiotlb_dma_ops into the dma_direct code")
Reported-by: Wang Zhaoyang1 <zhaoyang1.wang@intel.com>
Reported-by: Gao Liang <liang.gao@intel.com>
Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
121 lines
3.9 KiB
C
121 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 Christoph Hellwig.
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*
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* DMA operations that map physical memory directly without using an IOMMU.
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*/
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#ifndef _KERNEL_DMA_DIRECT_H
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#define _KERNEL_DMA_DIRECT_H
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#include <linux/dma-direct.h>
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int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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bool dma_direct_can_mmap(struct device *dev);
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int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr);
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int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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size_t dma_direct_max_mapping_size(struct device *dev);
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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defined(CONFIG_SWIOTLB)
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void dma_direct_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir);
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#else
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static inline void dma_direct_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
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defined(CONFIG_SWIOTLB)
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void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir, unsigned long attrs);
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void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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#else
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static inline void dma_direct_unmap_sg(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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}
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static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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static inline void dma_direct_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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phys_addr_t paddr = dma_to_phys(dev, addr);
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if (unlikely(is_swiotlb_buffer(dev, paddr)))
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swiotlb_sync_single_for_device(dev, paddr, size, dir);
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if (!dev_is_dma_coherent(dev))
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arch_sync_dma_for_device(paddr, size, dir);
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}
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static inline void dma_direct_sync_single_for_cpu(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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phys_addr_t paddr = dma_to_phys(dev, addr);
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if (!dev_is_dma_coherent(dev)) {
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arch_sync_dma_for_cpu(paddr, size, dir);
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arch_sync_dma_for_cpu_all();
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}
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if (unlikely(is_swiotlb_buffer(dev, paddr)))
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swiotlb_sync_single_for_cpu(dev, paddr, size, dir);
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if (dir == DMA_FROM_DEVICE)
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arch_dma_mark_clean(paddr, size);
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}
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static inline dma_addr_t dma_direct_map_page(struct device *dev,
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struct page *page, unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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phys_addr_t phys = page_to_phys(page) + offset;
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dma_addr_t dma_addr = phys_to_dma(dev, phys);
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if (is_swiotlb_force_bounce(dev))
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return swiotlb_map(dev, phys, size, dir, attrs);
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if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
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if (swiotlb_force != SWIOTLB_NO_FORCE)
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return swiotlb_map(dev, phys, size, dir, attrs);
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dev_WARN_ONCE(dev, 1,
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"DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
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&dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
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return DMA_MAPPING_ERROR;
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}
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if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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arch_sync_dma_for_device(phys, size, dir);
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return dma_addr;
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}
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static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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phys_addr_t phys = dma_to_phys(dev, addr);
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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dma_direct_sync_single_for_cpu(dev, addr, size, dir);
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if (unlikely(is_swiotlb_buffer(dev, phys)))
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swiotlb_tbl_unmap_single(dev, phys, size, dir,
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attrs | DMA_ATTR_SKIP_CPU_SYNC);
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}
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#endif /* _KERNEL_DMA_DIRECT_H */
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