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f7018c2135
The drivers/video directory is a mess. It contains generic video related files, directories for backlight, console, linux logo, lots of fbdev device drivers, fbdev framework files. Make some order into the chaos by creating drivers/video/fbdev directory, and move all fbdev related files there. No functionality is changed, although I guess it is possible that some subtle Makefile build order related issue could be created by this patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Clark <robdclark@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
245 lines
7.4 KiB
C
245 lines
7.4 KiB
C
/*
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* Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public
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* License as published by the Free Software Foundation;
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* either version 2, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
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* the implied warranty of MERCHANTABILITY or FITNESS FOR
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* A PARTICULAR PURPOSE.See the GNU General Public License
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* for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/via-core.h>
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#include <linux/via_i2c.h>
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#include "global.h"
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static const struct IODATA common_init_data[] = {
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/* Index, Mask, Value */
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/* Set panel power sequence timing */
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{0x10, 0xC0, 0x00},
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/* T1: VDD on - Data on. Each increment is 1 ms. (50ms = 031h) */
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{0x0B, 0xFF, 0x40},
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/* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */
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{0x0C, 0xFF, 0x31},
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/* T3: Backlight off -Data off. Each increment is 2 ms. (210ms = 068h)*/
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{0x0D, 0xFF, 0x31},
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/* T4: Data off - VDD off. Each increment is 1 ms. (50ms = 031h) */
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{0x0E, 0xFF, 0x68},
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/* T5: VDD off - VDD on. Each increment is 100 ms. (500ms = 04h) */
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{0x0F, 0xFF, 0x68},
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/* LVDS output power up */
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{0x09, 0xA0, 0xA0},
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/* turn on back light */
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{0x10, 0x33, 0x13}
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};
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/* Index, Mask, Value */
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static const struct IODATA dual_channel_enable_data = {0x08, 0xF0, 0xE0};
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static const struct IODATA single_channel_enable_data = {0x08, 0xF0, 0x00};
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static const struct IODATA dithering_enable_data = {0x0A, 0x70, 0x50};
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static const struct IODATA dithering_disable_data = {0x0A, 0x70, 0x00};
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static const struct IODATA vdd_on_data = {0x10, 0x20, 0x20};
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static const struct IODATA vdd_off_data = {0x10, 0x20, 0x00};
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u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
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u8 index)
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{
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u8 data;
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viafb_i2c_readbyte(plvds_chip_info->i2c_port,
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plvds_chip_info->lvds_chip_slave_addr, index, &data);
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return data;
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}
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void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information
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*plvds_chip_info, struct IODATA io_data)
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{
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int index, data;
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index = io_data.Index;
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data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info,
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index);
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data = (data & (~io_data.Mask)) | io_data.Data;
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viafb_i2c_writebyte(plvds_chip_info->i2c_port,
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plvds_chip_info->lvds_chip_slave_addr, index, data);
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}
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void viafb_init_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
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{
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int reg_num, i;
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/* Common settings: */
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reg_num = ARRAY_SIZE(common_init_data);
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for (i = 0; i < reg_num; i++)
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, common_init_data[i]);
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/* Input Data Mode Select */
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if (plvds_setting_info->device_lcd_dualedge)
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, dual_channel_enable_data);
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else
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, single_channel_enable_data);
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if (plvds_setting_info->LCDDithering)
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, dithering_enable_data);
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else
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, dithering_disable_data);
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}
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void viafb_enable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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vdd_on_data);
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}
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void viafb_disable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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vdd_off_data);
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}
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bool viafb_lvds_identify_vt1636(u8 i2c_adapter)
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{
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u8 Buffer[2];
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DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n");
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/* Sense VT1636 LVDS Transmiter */
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viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
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VT1636_LVDS_I2C_ADDR;
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/* Check vendor ID first: */
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if (viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR,
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0x00, &Buffer[0]))
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return false;
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viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x01, &Buffer[1]);
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if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11)))
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return false;
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/* Check Chip ID: */
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viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x02, &Buffer[0]);
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viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x03, &Buffer[1]);
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if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) {
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viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
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VT1636_LVDS;
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return true;
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}
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return false;
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}
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static int get_clk_range_index(u32 Clk)
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{
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if (Clk < DPA_CLK_30M)
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return DPA_CLK_RANGE_30M;
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else if (Clk < DPA_CLK_50M)
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return DPA_CLK_RANGE_30_50M;
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else if (Clk < DPA_CLK_70M)
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return DPA_CLK_RANGE_50_70M;
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else if (Clk < DPA_CLK_100M)
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return DPA_CLK_RANGE_70_100M;
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else if (Clk < DPA_CLK_150M)
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return DPA_CLK_RANGE_100_150M;
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else
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return DPA_CLK_RANGE_150M;
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}
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static void set_dpa_vt1636(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
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struct VT1636_DPA_SETTING *p_vt1636_dpa_setting)
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{
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struct IODATA io_data;
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io_data.Index = 0x09;
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io_data.Mask = 0x1F;
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io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1;
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, io_data);
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io_data.Index = 0x08;
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io_data.Mask = 0x0F;
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io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2;
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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io_data);
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}
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void viafb_vt1636_patch_skew_on_vt3324(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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struct VT1636_DPA_SETTING dpa = {0x00, 0x00}, dpa_16x12 = {0x0B, 0x03},
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*pdpa;
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int index;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3324[index]);
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/* LVDS Transmitter DPA settings: */
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if (plvds_setting_info->lcd_panel_hres == 1600 &&
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plvds_setting_info->lcd_panel_vres == 1200)
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pdpa = &dpa_16x12;
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else
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pdpa = &dpa;
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set_dpa_vt1636(plvds_setting_info, plvds_chip_info, pdpa);
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}
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void viafb_vt1636_patch_skew_on_vt3327(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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struct VT1636_DPA_SETTING dpa = {0x00, 0x00};
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int index;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3327[index]);
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/* LVDS Transmitter DPA settings: */
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set_dpa_vt1636(plvds_setting_info, plvds_chip_info, &dpa);
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}
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void viafb_vt1636_patch_skew_on_vt3364(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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int index;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3364[index]);
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}
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