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63e135a75f
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
226 lines
5.1 KiB
C
226 lines
5.1 KiB
C
/*
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* Copyright (C) 2009 Texas Instruments Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/gpio.h>
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#include <linux/mtd/nand.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "gpmc-smc91x.h"
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#include "board-zoom.h"
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#include "board-flash.h"
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#include "mux.h"
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#include "sdram-hynix-h8mbx00u0mer-0em.h"
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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static struct omap_smc91x_platform_data board_smc91x_data = {
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.cs = 3,
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.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
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};
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static void __init board_smc91x_init(void)
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{
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board_smc91x_data.gpio_irq = 158;
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gpmc_smc91x_init(&board_smc91x_data);
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}
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#else
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static inline void board_smc91x_init(void)
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{
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}
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#endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */
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static void enable_board_wakeup_source(void)
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{
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/* T2 interrupt line (keypad) */
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omap_mux_init_signal("sys_nirq",
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OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
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}
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static struct usbhs_phy_data phy_data[] __initdata = {
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{
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.port = 1,
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.reset_gpio = 126,
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.vcc_gpio = -EINVAL,
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},
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{
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.port = 2,
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.reset_gpio = 61,
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.vcc_gpio = -EINVAL,
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},
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};
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static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
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.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
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};
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#ifdef CONFIG_OMAP_MUX
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static struct omap_board_mux board_mux[] __initdata = {
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{ .reg_offset = OMAP_MUX_TERMINATOR },
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};
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#endif
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/*
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* SDP3630 CS organization
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* See also the Switch S8 settings in the comments.
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*/
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static char chip_sel_sdp[][GPMC_CS_NUM] = {
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{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
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{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
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{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
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};
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static struct mtd_partition sdp_nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "Bootloader-NOR",
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.offset = 0,
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.size = SZ_256K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "Params-NOR",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_256K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "Kernel-NOR",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* file system */
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{
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.name = "Filesystem-NOR",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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}
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};
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static struct mtd_partition sdp_onenand_partitions[] = {
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{
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.name = "X-Loader-OneNAND",
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.offset = 0,
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.size = 4 * (64 * 2048),
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.mask_flags = MTD_WRITEABLE /* force read-only */
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},
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{
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.name = "U-Boot-OneNAND",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * (64 * 2048),
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.mask_flags = MTD_WRITEABLE /* force read-only */
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},
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{
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.name = "U-Boot Environment-OneNAND",
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.offset = MTDPART_OFS_APPEND,
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.size = 1 * (64 * 2048),
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},
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{
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.name = "Kernel-OneNAND",
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.offset = MTDPART_OFS_APPEND,
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.size = 16 * (64 * 2048),
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},
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{
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.name = "File System-OneNAND",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct mtd_partition sdp_nand_partitions[] = {
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/* All the partition sizes are listed in terms of NAND block size */
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{
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.name = "X-Loader-NAND",
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.offset = 0,
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.size = 4 * (64 * 2048),
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "U-Boot-NAND",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
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.size = 10 * (64 * 2048),
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "Boot Env-NAND",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
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.size = 6 * (64 * 2048),
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},
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{
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.name = "Kernel-NAND",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
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.size = 40 * (64 * 2048),
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},
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{
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.name = "File System - NAND",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
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},
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};
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static struct flash_partitions sdp_flash_partitions[] = {
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{
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.parts = sdp_nor_partitions,
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.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
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},
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{
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.parts = sdp_onenand_partitions,
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.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
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},
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{
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.parts = sdp_nand_partitions,
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.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
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},
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};
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static void __init omap_sdp_init(void)
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{
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omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
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zoom_peripherals_init();
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omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
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h8mbx00u0mer0em_sdrc_params);
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zoom_display_init();
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board_smc91x_init();
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board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
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enable_board_wakeup_source();
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usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
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usbhs_init(&usbhs_bdata);
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}
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MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
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.atag_offset = 0x100,
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.reserve = omap_reserve,
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.map_io = omap3_map_io,
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.init_early = omap3630_init_early,
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.init_irq = omap3_init_irq,
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.handle_irq = omap3_intc_handle_irq,
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.init_machine = omap_sdp_init,
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.init_late = omap3630_init_late,
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.init_time = omap3_sync32k_timer_init,
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.restart = omap3xxx_restart,
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MACHINE_END
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