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145d01e428
This patch allows iSeries to build with CONFIG_PCI=n. This is useful for partitions that have only virtual I/O. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
177 lines
4.7 KiB
C
177 lines
4.7 KiB
C
/*
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* arch/ppc64/kernel/iSeries_iommu.c
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*
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
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*
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* Rewrite, cleanup:
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*
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* Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
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*
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* Dynamic DMA mapping support, iSeries-specific parts.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <linux/list.h>
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#include <asm/iommu.h>
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#include <asm/machdep.h>
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#include <asm/iSeries/HvCallXm.h>
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#include <asm/iSeries/iSeries_pci.h>
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extern struct list_head iSeries_Global_Device_List;
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static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
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unsigned long uaddr, enum dma_data_direction direction)
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{
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u64 rc;
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union tce_entry tce;
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while (npages--) {
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tce.te_word = 0;
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tce.te_bits.tb_rpn = virt_to_abs(uaddr) >> PAGE_SHIFT;
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if (tbl->it_type == TCE_VB) {
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/* Virtual Bus */
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tce.te_bits.tb_valid = 1;
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tce.te_bits.tb_allio = 1;
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if (direction != DMA_TO_DEVICE)
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tce.te_bits.tb_rdwr = 1;
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} else {
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/* PCI Bus */
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tce.te_bits.tb_rdwr = 1; /* Read allowed */
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if (direction != DMA_TO_DEVICE)
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tce.te_bits.tb_pciwr = 1;
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}
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rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index,
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tce.te_word);
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if (rc)
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panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
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rc);
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index++;
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uaddr += PAGE_SIZE;
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}
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}
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static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
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{
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u64 rc;
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while (npages--) {
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rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
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if (rc)
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panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
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rc);
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index++;
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}
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}
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#ifdef CONFIG_PCI
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/*
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* This function compares the known tables to find an iommu_table
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* that has already been built for hardware TCEs.
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*/
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static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
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{
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struct iSeries_Device_Node *dp;
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list_for_each_entry(dp, &iSeries_Global_Device_List, Device_List) {
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if ((dp->iommu_table != NULL) &&
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(dp->iommu_table->it_type == TCE_PCI) &&
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(dp->iommu_table->it_offset == tbl->it_offset) &&
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(dp->iommu_table->it_index == tbl->it_index) &&
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(dp->iommu_table->it_size == tbl->it_size))
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return dp->iommu_table;
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}
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return NULL;
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}
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/*
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* Call Hv with the architected data structure to get TCE table info.
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* info. Put the returned data into the Linux representation of the
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* TCE table data.
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* The Hardware Tce table comes in three flavors.
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* 1. TCE table shared between Buses.
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* 2. TCE table per Bus.
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* 3. TCE Table per IOA.
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*/
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static void iommu_table_getparms(struct iSeries_Device_Node* dn,
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struct iommu_table* tbl)
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{
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struct iommu_table_cb *parms;
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parms = kmalloc(sizeof(*parms), GFP_KERNEL);
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if (parms == NULL)
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panic("PCI_DMA: TCE Table Allocation failed.");
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memset(parms, 0, sizeof(*parms));
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parms->itc_busno = ISERIES_BUS(dn);
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parms->itc_slotno = dn->LogicalSlot;
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parms->itc_virtbus = 0;
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HvCallXm_getTceTableParms(ISERIES_HV_ADDR(parms));
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if (parms->itc_size == 0)
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panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
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/* itc_size is in pages worth of table, it_size is in # of entries */
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tbl->it_size = (parms->itc_size * PAGE_SIZE) / sizeof(union tce_entry);
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tbl->it_busno = parms->itc_busno;
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tbl->it_offset = parms->itc_offset;
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tbl->it_index = parms->itc_index;
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tbl->it_blocksize = 1;
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tbl->it_type = TCE_PCI;
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kfree(parms);
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}
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void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn)
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{
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struct iommu_table *tbl;
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tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
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iommu_table_getparms(dn, tbl);
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/* Look for existing tce table */
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dn->iommu_table = iommu_table_find(tbl);
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if (dn->iommu_table == NULL)
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dn->iommu_table = iommu_init_table(tbl);
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else
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kfree(tbl);
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}
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#endif
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static void iommu_dev_setup_iSeries(struct pci_dev *dev) { }
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static void iommu_bus_setup_iSeries(struct pci_bus *bus) { }
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void iommu_init_early_iSeries(void)
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{
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ppc_md.tce_build = tce_build_iSeries;
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ppc_md.tce_free = tce_free_iSeries;
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ppc_md.iommu_dev_setup = iommu_dev_setup_iSeries;
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ppc_md.iommu_bus_setup = iommu_bus_setup_iSeries;
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pci_iommu_init();
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}
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