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8546dc1d4b
Pull ARM updates from Russell King:
"The major items included in here are:
- MCPM, multi-cluster power management, part of the infrastructure
required for ARMs big.LITTLE support.
- A rework of the ARM KVM code to allow re-use by ARM64.
- Error handling cleanups of the IS_ERR_OR_NULL() madness and fixes
of that stuff for arch/arm
- Preparatory patches for Cortex-M3 support from Uwe Kleine-König.
There is also a set of three patches in here from Hugh/Catalin to
address freeing of inappropriate page tables on LPAE. You already
have these from akpm, but they were already part of my tree at the
time he sent them, so unfortunately they'll end up with duplicate
commits"
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits)
ARM: EXYNOS: remove unnecessary use of IS_ERR_VALUE()
ARM: IMX: remove unnecessary use of IS_ERR_VALUE()
ARM: OMAP: use consistent error checking
ARM: cleanup: OMAP hwmod error checking
ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernels
ARM: 7700/2: Make cpu_init() notrace
ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE
ARM: 7701/1: mm: Allow arch code to control the user page table ceiling
ARM: 7703/1: Disable preemption in broadcast_tlb*_a15_erratum()
ARM: mcpm: provide an interface to set the SMP ops at run time
ARM: mcpm: generic SMP secondary bringup and hotplug support
ARM: mcpm_head.S: vlock-based first man election
ARM: mcpm: Add baremetal voting mutexes
ARM: mcpm: introduce helpers for platform coherency exit/setup
ARM: mcpm: introduce the CPU/cluster power API
ARM: multi-cluster PM: secondary kernel entry code
ARM: cacheflush: add synchronization helpers for mixed cache state accesses
ARM: cpu hotplug: remove majority of cache flushing from platforms
ARM: smp: flush L1 cache in cpu_die()
ARM: tegra: remove tegra specific cpu_disable()
...
102 lines
2.0 KiB
C
102 lines
2.0 KiB
C
/*
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* linux/arch/arm/mach-spear13xx/hotplug.c
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*
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* Copyright (C) 2012 ST Microelectronics Ltd.
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* Deepak Sikri <deepak.sikri@st.com>
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*
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* based upon linux/arch/arm/mach-realview/hotplug.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <asm/cp15.h>
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#include <asm/smp_plat.h>
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static inline void cpu_enter_lowpower(void)
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{
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unsigned int v;
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asm volatile(
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" mcr p15, 0, %1, c7, c5, 0\n"
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" dsb\n"
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/*
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* Turn off coherency
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "r" (0), "Ir" (CR_C)
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: "cc", "memory");
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}
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static inline void cpu_leave_lowpower(void)
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{
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unsigned int v;
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asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "Ir" (CR_C)
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: "cc");
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}
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static inline void spear13xx_do_lowpower(unsigned int cpu, int *spurious)
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{
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for (;;) {
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wfi();
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if (pen_release == cpu) {
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/*
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* OK, proper wakeup, we're done
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*/
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break;
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}
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/*
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* Getting here, means that we have come out of WFI without
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* having been woken up - this shouldn't happen
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*
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* Just note it happening - when we're woken, we can report
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* its occurrence.
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*/
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(*spurious)++;
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}
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void __ref spear13xx_cpu_die(unsigned int cpu)
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{
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int spurious = 0;
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/*
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* we're ready for shutdown now, so do it
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*/
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cpu_enter_lowpower();
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spear13xx_do_lowpower(cpu, &spurious);
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/*
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* bring this CPU back into the world of cache
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* coherency, and then restore interrupts
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*/
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cpu_leave_lowpower();
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if (spurious)
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pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
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}
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