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eed34d0fc5
Add kernel-doc function headers in kernel/dma.c and use it in DocBook.
Clean up kernel-doc in mca_dma.h (the colon (':') represents a
section header).
Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
202 lines
5.1 KiB
C
202 lines
5.1 KiB
C
#ifndef MCA_DMA_H
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#define MCA_DMA_H
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#include <asm/io.h>
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#include <linux/ioport.h>
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/*
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* Microchannel specific DMA stuff. DMA on an MCA machine is fairly similar to
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* standard PC dma, but it certainly has its quirks. DMA register addresses
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* are in a different place and there are some added functions. Most of this
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* should be pretty obvious on inspection. Note that the user must divide
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* count by 2 when using 16-bit dma; that is not handled by these functions.
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*
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* Ramen Noodles are yummy.
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*
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* 1998 Tymm Twillman <tymm@computer.org>
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*/
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/*
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* Registers that are used by the DMA controller; FN is the function register
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* (tell the controller what to do) and EXE is the execution register (how
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* to do it)
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*/
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#define MCA_DMA_REG_FN 0x18
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#define MCA_DMA_REG_EXE 0x1A
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/*
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* Functions that the DMA controller can do
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*/
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#define MCA_DMA_FN_SET_IO 0x00
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#define MCA_DMA_FN_SET_ADDR 0x20
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#define MCA_DMA_FN_GET_ADDR 0x30
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#define MCA_DMA_FN_SET_COUNT 0x40
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#define MCA_DMA_FN_GET_COUNT 0x50
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#define MCA_DMA_FN_GET_STATUS 0x60
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#define MCA_DMA_FN_SET_MODE 0x70
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#define MCA_DMA_FN_SET_ARBUS 0x80
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#define MCA_DMA_FN_MASK 0x90
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#define MCA_DMA_FN_RESET_MASK 0xA0
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#define MCA_DMA_FN_MASTER_CLEAR 0xD0
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/*
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* Modes (used by setting MCA_DMA_FN_MODE in the function register)
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*
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* Note that the MODE_READ is read from memory (write to device), and
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* MODE_WRITE is vice-versa.
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*/
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#define MCA_DMA_MODE_XFER 0x04 /* read by default */
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#define MCA_DMA_MODE_READ 0x04 /* same as XFER */
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#define MCA_DMA_MODE_WRITE 0x08 /* OR with MODE_XFER to use */
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#define MCA_DMA_MODE_IO 0x01 /* DMA from IO register */
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#define MCA_DMA_MODE_16 0x40 /* 16 bit xfers */
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/**
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* mca_enable_dma - channel to enable DMA on
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* @dmanr: DMA channel
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*
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* Enable the MCA bus DMA on a channel. This can be called from
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* IRQ context.
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*/
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static __inline__ void mca_enable_dma(unsigned int dmanr)
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{
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outb(MCA_DMA_FN_RESET_MASK | dmanr, MCA_DMA_REG_FN);
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}
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/**
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* mca_disble_dma - channel to disable DMA on
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* @dmanr: DMA channel
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*
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* Enable the MCA bus DMA on a channel. This can be called from
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* IRQ context.
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*/
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static __inline__ void mca_disable_dma(unsigned int dmanr)
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{
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outb(MCA_DMA_FN_MASK | dmanr, MCA_DMA_REG_FN);
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}
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/**
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* mca_set_dma_addr - load a 24bit DMA address
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* @dmanr: DMA channel
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* @a: 24bit bus address
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*
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* Load the address register in the DMA controller. This has a 24bit
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* limitation (16Mb).
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*/
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static __inline__ void mca_set_dma_addr(unsigned int dmanr, unsigned int a)
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{
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outb(MCA_DMA_FN_SET_ADDR | dmanr, MCA_DMA_REG_FN);
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outb(a & 0xff, MCA_DMA_REG_EXE);
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outb((a >> 8) & 0xff, MCA_DMA_REG_EXE);
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outb((a >> 16) & 0xff, MCA_DMA_REG_EXE);
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}
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/**
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* mca_get_dma_addr - load a 24bit DMA address
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* @dmanr: DMA channel
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*
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* Read the address register in the DMA controller. This has a 24bit
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* limitation (16Mb). The return is a bus address.
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*/
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static __inline__ unsigned int mca_get_dma_addr(unsigned int dmanr)
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{
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unsigned int addr;
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outb(MCA_DMA_FN_GET_ADDR | dmanr, MCA_DMA_REG_FN);
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addr = inb(MCA_DMA_REG_EXE);
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addr |= inb(MCA_DMA_REG_EXE) << 8;
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addr |= inb(MCA_DMA_REG_EXE) << 16;
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return addr;
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}
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/**
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* mca_set_dma_count - load a 16bit transfer count
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* @dmanr: DMA channel
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* @count: count
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*
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* Set the DMA count for this channel. This can be up to 64Kbytes.
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* Setting a count of zero will not do what you expect.
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*/
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static __inline__ void mca_set_dma_count(unsigned int dmanr, unsigned int count)
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{
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count--; /* transfers one more than count -- correct for this */
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outb(MCA_DMA_FN_SET_COUNT | dmanr, MCA_DMA_REG_FN);
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outb(count & 0xff, MCA_DMA_REG_EXE);
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outb((count >> 8) & 0xff, MCA_DMA_REG_EXE);
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}
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/**
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* mca_get_dma_residue - get the remaining bytes to transfer
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* @dmanr: DMA channel
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*
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* This function returns the number of bytes left to transfer
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* on this DMA channel.
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*/
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static __inline__ unsigned int mca_get_dma_residue(unsigned int dmanr)
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{
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unsigned short count;
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outb(MCA_DMA_FN_GET_COUNT | dmanr, MCA_DMA_REG_FN);
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count = 1 + inb(MCA_DMA_REG_EXE);
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count += inb(MCA_DMA_REG_EXE) << 8;
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return count;
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}
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/**
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* mca_set_dma_io - set the port for an I/O transfer
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* @dmanr: DMA channel
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* @io_addr: an I/O port number
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*
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* Unlike the ISA bus DMA controllers the DMA on MCA bus can transfer
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* with an I/O port target.
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*/
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static __inline__ void mca_set_dma_io(unsigned int dmanr, unsigned int io_addr)
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{
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/*
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* DMA from a port address -- set the io address
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*/
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outb(MCA_DMA_FN_SET_IO | dmanr, MCA_DMA_REG_FN);
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outb(io_addr & 0xff, MCA_DMA_REG_EXE);
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outb((io_addr >> 8) & 0xff, MCA_DMA_REG_EXE);
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}
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/**
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* mca_set_dma_mode - set the DMA mode
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* @dmanr: DMA channel
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* @mode: mode to set
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*
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* The DMA controller supports several modes. The mode values you can
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* set are-
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*
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* %MCA_DMA_MODE_READ when reading from the DMA device.
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*
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* %MCA_DMA_MODE_WRITE to writing to the DMA device.
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*
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* %MCA_DMA_MODE_IO to do DMA to or from an I/O port.
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*
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* %MCA_DMA_MODE_16 to do 16bit transfers.
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*/
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static __inline__ void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)
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{
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outb(MCA_DMA_FN_SET_MODE | dmanr, MCA_DMA_REG_FN);
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outb(mode, MCA_DMA_REG_EXE);
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}
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#endif /* MCA_DMA_H */
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