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e91d0f05e6
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
367 lines
9.0 KiB
C
367 lines
9.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MPC52xx gpio driver
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*
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* Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*/
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#include <linux/of.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/gpio/legacy-of-mm-gpiochip.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <asm/mpc52xx.h>
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#include <sysdev/fsl_soc.h>
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static DEFINE_SPINLOCK(gpio_lock);
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struct mpc52xx_gpiochip {
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struct of_mm_gpio_chip mmchip;
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unsigned int shadow_dvo;
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unsigned int shadow_gpioe;
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unsigned int shadow_ddr;
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};
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/*
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* GPIO LIB API implementation for wakeup GPIOs.
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*
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* There's a maximum of 8 wakeup GPIOs. Which of these are available
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* for use depends on your board setup.
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*
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* 0 -> GPIO_WKUP_7
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* 1 -> GPIO_WKUP_6
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* 2 -> PSC6_1
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* 3 -> PSC6_0
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* 4 -> ETH_17
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* 5 -> PSC3_9
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* 6 -> PSC2_4
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* 7 -> PSC1_4
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*
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*/
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static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
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unsigned int ret;
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ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
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pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
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return ret;
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}
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static inline void
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__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
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if (val)
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chip->shadow_dvo |= 1 << (7 - gpio);
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else
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chip->shadow_dvo &= ~(1 << (7 - gpio));
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out_8(®s->wkup_dvo, chip->shadow_dvo);
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}
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static void
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mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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__mpc52xx_wkup_gpio_set(gc, gpio, val);
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spin_unlock_irqrestore(&gpio_lock, flags);
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pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
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}
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static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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/* set the direction */
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chip->shadow_ddr &= ~(1 << (7 - gpio));
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out_8(®s->wkup_ddr, chip->shadow_ddr);
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/* and enable the pin */
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chip->shadow_gpioe |= 1 << (7 - gpio);
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out_8(®s->wkup_gpioe, chip->shadow_gpioe);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return 0;
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}
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static int
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mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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__mpc52xx_wkup_gpio_set(gc, gpio, val);
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/* Then set direction */
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chip->shadow_ddr |= 1 << (7 - gpio);
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out_8(®s->wkup_ddr, chip->shadow_ddr);
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/* Finally enable the pin */
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chip->shadow_gpioe |= 1 << (7 - gpio);
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out_8(®s->wkup_gpioe, chip->shadow_gpioe);
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spin_unlock_irqrestore(&gpio_lock, flags);
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pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
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return 0;
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}
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static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
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{
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struct mpc52xx_gpiochip *chip;
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struct mpc52xx_gpio_wkup __iomem *regs;
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struct gpio_chip *gc;
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int ret;
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chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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platform_set_drvdata(ofdev, chip);
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gc = &chip->mmchip.gc;
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gc->ngpio = 8;
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gc->direction_input = mpc52xx_wkup_gpio_dir_in;
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gc->direction_output = mpc52xx_wkup_gpio_dir_out;
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gc->get = mpc52xx_wkup_gpio_get;
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gc->set = mpc52xx_wkup_gpio_set;
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ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
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if (ret)
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return ret;
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regs = chip->mmchip.regs;
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chip->shadow_gpioe = in_8(®s->wkup_gpioe);
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chip->shadow_ddr = in_8(®s->wkup_ddr);
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chip->shadow_dvo = in_8(®s->wkup_dvo);
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return 0;
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}
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static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
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{
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struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
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of_mm_gpiochip_remove(&chip->mmchip);
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return 0;
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}
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static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
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{ .compatible = "fsl,mpc5200-gpio-wkup", },
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{}
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};
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static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
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.driver = {
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.name = "mpc5200-gpio-wkup",
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.of_match_table = mpc52xx_wkup_gpiochip_match,
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},
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.probe = mpc52xx_wkup_gpiochip_probe,
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.remove = mpc52xx_gpiochip_remove,
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};
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/*
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* GPIO LIB API implementation for simple GPIOs
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*
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* There's a maximum of 32 simple GPIOs. Which of these are available
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* for use depends on your board setup.
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* The numbering reflects the bit numbering in the port registers:
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*
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* 0..1 > reserved
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* 2..3 > IRDA
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* 4..7 > ETHR
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* 8..11 > reserved
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* 12..15 > USB
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* 16..17 > reserved
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* 18..23 > PSC3
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* 24..27 > PSC2
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* 28..31 > PSC1
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*/
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static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
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unsigned int ret;
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ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1;
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return ret;
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}
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static inline void
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__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
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if (val)
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chip->shadow_dvo |= 1 << (31 - gpio);
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else
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chip->shadow_dvo &= ~(1 << (31 - gpio));
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out_be32(®s->simple_dvo, chip->shadow_dvo);
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}
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static void
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mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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__mpc52xx_simple_gpio_set(gc, gpio, val);
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spin_unlock_irqrestore(&gpio_lock, flags);
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pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
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}
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static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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/* set the direction */
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chip->shadow_ddr &= ~(1 << (31 - gpio));
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out_be32(®s->simple_ddr, chip->shadow_ddr);
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/* and enable the pin */
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chip->shadow_gpioe |= 1 << (31 - gpio);
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out_be32(®s->simple_gpioe, chip->shadow_gpioe);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return 0;
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}
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static int
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mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
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struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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/* First set initial value */
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__mpc52xx_simple_gpio_set(gc, gpio, val);
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/* Then set direction */
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chip->shadow_ddr |= 1 << (31 - gpio);
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out_be32(®s->simple_ddr, chip->shadow_ddr);
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/* Finally enable the pin */
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chip->shadow_gpioe |= 1 << (31 - gpio);
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out_be32(®s->simple_gpioe, chip->shadow_gpioe);
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spin_unlock_irqrestore(&gpio_lock, flags);
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pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
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return 0;
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}
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static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
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{
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struct mpc52xx_gpiochip *chip;
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struct gpio_chip *gc;
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struct mpc52xx_gpio __iomem *regs;
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int ret;
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chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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platform_set_drvdata(ofdev, chip);
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gc = &chip->mmchip.gc;
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gc->ngpio = 32;
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gc->direction_input = mpc52xx_simple_gpio_dir_in;
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gc->direction_output = mpc52xx_simple_gpio_dir_out;
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gc->get = mpc52xx_simple_gpio_get;
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gc->set = mpc52xx_simple_gpio_set;
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ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
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if (ret)
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return ret;
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regs = chip->mmchip.regs;
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chip->shadow_gpioe = in_be32(®s->simple_gpioe);
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chip->shadow_ddr = in_be32(®s->simple_ddr);
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chip->shadow_dvo = in_be32(®s->simple_dvo);
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return 0;
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}
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static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
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{ .compatible = "fsl,mpc5200-gpio", },
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{}
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};
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static struct platform_driver mpc52xx_simple_gpiochip_driver = {
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.driver = {
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.name = "mpc5200-gpio",
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.of_match_table = mpc52xx_simple_gpiochip_match,
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},
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.probe = mpc52xx_simple_gpiochip_probe,
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.remove = mpc52xx_gpiochip_remove,
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};
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static struct platform_driver * const drivers[] = {
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&mpc52xx_wkup_gpiochip_driver,
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&mpc52xx_simple_gpiochip_driver,
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};
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static int __init mpc52xx_gpio_init(void)
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{
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return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
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}
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/* Make sure we get initialised before anyone else tries to use us */
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subsys_initcall(mpc52xx_gpio_init);
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static void __exit mpc52xx_gpio_exit(void)
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{
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platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
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}
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module_exit(mpc52xx_gpio_exit);
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MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
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MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
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MODULE_LICENSE("GPL v2");
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