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69dac8e431
There's still a handful of new features in here, but there are a lot of
fixes/cleanups as well:
* Support for the Zicbom for explicit cache-block management, along with
the necessary bits to make the non-standard cache management ops on
the Allwinner D1 function.
* Support for the Zihintpause extension, which codifies a go-slow
instruction used for cpu_relax().
* Support for the Sstc extension for supervisor-mode timer/counter
management.
* Many device tree fixes and cleanups, including a large set for the
Canaan device trees.
* A handful of fixes and cleanups for the PMU driver.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmL21egTHHBhbG1lckBk
YWJiZWx0LmNvbQAKCRAuExnzX7sYiSsiD/9cCN/7ndt4v7N65PUya+mVYC9VPppB
d/UC74M0mMUHQbtdtHzlCZVHW0pxc6Pc8oDTWLviKxNSHa6LQkLQJ/RZZz4YlH91
V/vh6DCZv9TRfHJS2E6jMUKEAVAiGg+723gE5EqLc5uapIBrvmiluQwBIQcu8dj1
egfdxJH3IVrEZWwROrYtffDgw4sipENuch5v4yhk4vH0bMlatcIM+hMpPZgOfbgX
xip4K4B/HTAJRn5vunrlCQzYdg+g9l5iEy73A/A9HfzOFCMTMJFp1zHvIrzLUjKC
79MZza3GJLpwMG4C1j8u+qOL01wVrQcA5gNp+14UuUedl/jHaceZwBkCL4cmFyGP
LE94Ed7+6cIJJH/NTcNfOOSD9byOePjfan+qJIlRBxZGbHKt+Ip6Lu2FGeftpXah
MlhhN5S1nGTuFpn7XGRsYrB/VLBD/KWsLxvWBZZWsSYwHwnFA9ZTUbcuQfxTJ+Qq
mH9wZIZ/z8MaEjKcdooIPHjKl+CFjDpVYWge83/t12LLYC9ryTM4vIlltZ84bs6i
2CMSNjBRSuPa7FQPHW+a6CWAjz2Lv1u9jCSH0iI62ytZR5/zinI39tv6LvwbypbY
VfWBnrtLNLlZmNbk13ODV64ayhTpZoZXWGL2TvkJklBqEPqda+9/nopiqb8a8jFZ
yEmKFdEqrb1LAg==
=caji
-----END PGP SIGNATURE-----
Merge tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull more RISC-V updates from Palmer Dabbelt:
"There's still a handful of new features in here, but there are a lot
of fixes/cleanups as well:
- Support for the Zicbom extension for explicit cache-block
management, along with the necessary bits to make the non-standard
cache management ops on the Allwinner D1 function
- Support for the Zihintpause extension, which codifies a go-slow
instruction used for cpu_relax()
- Support for the Sstc extension for supervisor-mode timer/counter
management
- Many device tree fixes and cleanups, including a large set for the
Canaan device trees
- A handful of fixes and cleanups for the PMU driver"
* tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (43 commits)
dt-bindings: gpio: sifive: add gpio-line-names
wireguard: selftests: set CONFIG_NONPORTABLE on riscv32
RISC-V: KVM: Support sstc extension
RISC-V: Improve SBI definitions
RISC-V: Move counter info definition to sbi header file
RISC-V: Fix SBI PMU calls for RV32
RISC-V: Update user page mapping only once during start
RISC-V: Fix counter restart during overflow for RV32
RISC-V: Prefer sstc extension if available
RISC-V: Enable sstc extension parsing from DT
RISC-V: Add SSTC extension CSR details
riscv:uprobe fix SR_SPIE set/clear handling
dt-bindings: riscv: fix SiFive l2-cache's cache-sets
riscv: ensure cpu_ops_sbi is declared
RISC-V: cpu_ops_spinwait.c should include head.h
RISC-V: Declare cpu_ops_spinwait in <asm/cpu_ops.h>
riscv: dts: starfive: correct number of external interrupts
riscv: dts: sifive unmatched: Add PWM controlled LEDs
riscv/purgatory: Omit use of bin2c
riscv/purgatory: hard-code obj-y in Makefile
...
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| .. | ||
| unittest-data | ||
| address.c | ||
| base.c | ||
| device.c | ||
| dynamic.c | ||
| fdt_address.c | ||
| fdt.c | ||
| irq.c | ||
| Kconfig | ||
| kexec.c | ||
| kobj.c | ||
| Makefile | ||
| of_numa.c | ||
| of_private.h | ||
| of_reserved_mem.c | ||
| overlay.c | ||
| pdt.c | ||
| platform.c | ||
| property.c | ||
| resolver.c | ||
| unittest.c | ||