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3ef3714000
Add device-tree binding documentation SFP transceivers. Support for SFP transceivers has been recently introduced (drivers/net/phy/sfp.c). Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
77 lines
2.2 KiB
Plaintext
77 lines
2.2 KiB
Plaintext
Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
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Transceiver
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Required properties:
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- compatible : must be "sff,sfp"
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Optional Properties:
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- i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
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interface
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- mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
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module presence input gpio signal, active (module absent) high
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- los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
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Indication input gpio signal, active (signal lost) high
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- tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
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Fault input gpio signal, active (fault condition) high
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- tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
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output gpio signal, active (Tx disable) high
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- rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate
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Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate
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- rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate
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Select (AKA RS1) output gpio signal (SFP+ only), low: low Tx rate, high:
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high Tx rate
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Example #1: Direct serdes to SFP connection
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sfp_eth3: sfp-eth3 {
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compatible = "sff,sfp";
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i2c-bus = <&sfp_1g_i2c>;
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los-gpios = <&cpm_gpio2 22 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&cpm_gpio2 21 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_sfp_1g_pins &cps_sfp_1g_pins>;
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tx-disable-gpios = <&cps_gpio1 24 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>;
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};
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&cps_emac3 {
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phy-names = "comphy";
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phys = <&cps_comphy5 0>;
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sfp = <&sfp_eth3>;
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};
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Example #2: Serdes to PHY to SFP connection
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sfp_eth0: sfp-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&sfpp0_i2c>;
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los-gpios = <&cps_gpio1 28 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&cps_gpio1 27 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cps_sfpp0_pins>;
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tx-disable-gpios = <&cps_gpio1 29 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>;
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};
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p0_phy: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_phy0_pins &cps_phy0_pins>;
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reg = <0>;
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interrupt = <&cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING>;
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sfp = <&sfp_eth0>;
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};
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&cpm_eth0 {
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phy = <&p0_phy>;
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phy-mode = "10gbase-kr";
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};
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